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| author | Chris Lattner <sabre@nondot.org> | 2005-10-23 22:08:13 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2005-10-23 22:08:13 +0000 |
| commit | a389f0d8fa49cae83790a8229bd19edb092fa0aa (patch) | |
| tree | 692cbf6a72c324131f207dc7929b6c7303ec08e2 /llvm/lib/Target | |
| parent | 437fd559d7d7394ccafc700876a45480a8eb8cc5 (diff) | |
| download | bcm5719-llvm-a389f0d8fa49cae83790a8229bd19edb092fa0aa.tar.gz bcm5719-llvm-a389f0d8fa49cae83790a8229bd19edb092fa0aa.zip | |
rearrange things a bit so that instructions can use subtarget features in the
future.
llvm-svn: 23902
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPC.td | 20 |
1 files changed, 9 insertions, 11 deletions
diff --git a/llvm/lib/Target/PowerPC/PPC.td b/llvm/lib/Target/PowerPC/PPC.td index 166a98fc13a..da63511bf1b 100644 --- a/llvm/lib/Target/PowerPC/PPC.td +++ b/llvm/lib/Target/PowerPC/PPC.td @@ -16,16 +16,6 @@ include "../Target.td" //===----------------------------------------------------------------------===// -// Register File Description -//===----------------------------------------------------------------------===// - -include "PPCRegisterInfo.td" -include "PPCSchedule.td" -include "PPCInstrInfo.td" - - - -//===----------------------------------------------------------------------===// // PowerPC Subtarget features. // @@ -41,7 +31,15 @@ def FeatureFSqrt : SubtargetFeature<"fsqrt", "Enable the fsqrt instruction">; //===----------------------------------------------------------------------===// -// PowerPC chips sets supported. +// Register File Description +//===----------------------------------------------------------------------===// + +include "PPCRegisterInfo.td" +include "PPCSchedule.td" +include "PPCInstrInfo.td" + +//===----------------------------------------------------------------------===// +// PowerPC processors supported. // def : Processor<"generic", G3Itineraries, []>; |
