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| author | Matthias Braun <matze@braunis.de> | 2017-10-17 21:46:15 +0000 |
|---|---|---|
| committer | Matthias Braun <matze@braunis.de> | 2017-10-17 21:46:15 +0000 |
| commit | a2f96b5bde85bf496c3b8c26335757592fdea937 (patch) | |
| tree | 9b297f71de426326d32f3fe337e78747e16ae1c7 /llvm/lib/Target | |
| parent | 350a87eaf199a077b034d3831d09e3e04d2a0c7e (diff) | |
| download | bcm5719-llvm-a2f96b5bde85bf496c3b8c26335757592fdea937.tar.gz bcm5719-llvm-a2f96b5bde85bf496c3b8c26335757592fdea937.zip | |
AArch64: Enable AES instruction fusion on Cyclone.
Note that cyclone itself doesn't fuse, but newer apple chips do and we
are using cyclone as the default when targeting apple OSes.
The current code also does not capture all fusion patterns of apple CPUs
yet; I am still looking for ways to refactor the code nicely to extend
it.
llvm-svn: 316036
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64.td | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64.td b/llvm/lib/Target/AArch64/AArch64.td index 500632b50cd..ce0bce5e3ae 100644 --- a/llvm/lib/Target/AArch64/AArch64.td +++ b/llvm/lib/Target/AArch64/AArch64.td @@ -274,14 +274,17 @@ def ProcA75 : SubtargetFeature<"a75", "ARMProcFamily", "CortexA75", FeaturePerfMon ]>; +// Note that cyclone does not fuse AES instructions, but newer apple chips do +// perform the fusion and cyclone is used by default when targetting apple OSes. def ProcCyclone : SubtargetFeature<"cyclone", "ARMProcFamily", "Cyclone", "Cyclone", [ FeatureAlternateSExtLoadCVTF32Pattern, + FeatureArithmeticBccFusion, + FeatureArithmeticCbzFusion, FeatureCrypto, FeatureDisableLatencySchedHeuristic, FeatureFPARMv8, - FeatureArithmeticBccFusion, - FeatureArithmeticCbzFusion, + FeatureFuseAES, FeatureNEON, FeaturePerfMon, FeatureSlowMisaligned128Store, |
