diff options
| author | Chris Lattner <sabre@nondot.org> | 2004-05-07 21:18:15 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2004-05-07 21:18:15 +0000 |
| commit | a2dc6bf6e6b51f833a869529bf5827a1703693d4 (patch) | |
| tree | 74ecb368b7e7388da5b4c524a7a9a9652903a8b1 /llvm/lib/Target | |
| parent | 1edc9637d09f6a3c83156390cbbd22556b66637a (diff) | |
| download | bcm5719-llvm-a2dc6bf6e6b51f833a869529bf5827a1703693d4.tar.gz bcm5719-llvm-a2dc6bf6e6b51f833a869529bf5827a1703693d4.zip | |
Codegen floating point stores of constants into integer instructions. This
allows us to compile:
store float 10.0, float* %P
into:
mov DWORD PTR [%EAX], 1092616192
instead of:
.CPItest_0: # float 0x4024000000000000
.long 1092616192 # float 10
...
fld DWORD PTR [.CPItest_0]
fstp DWORD PTR [%EAX]
llvm-svn: 13409
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/X86/InstSelectSimple.cpp | 52 |
1 files changed, 37 insertions, 15 deletions
diff --git a/llvm/lib/Target/X86/InstSelectSimple.cpp b/llvm/lib/Target/X86/InstSelectSimple.cpp index 4597a824738..eb41077dc53 100644 --- a/llvm/lib/Target/X86/InstSelectSimple.cpp +++ b/llvm/lib/Target/X86/InstSelectSimple.cpp @@ -2879,23 +2879,45 @@ void ISel::visitStoreInst(StoreInst &I) { } else if (ConstantBool *CB = dyn_cast<ConstantBool>(I.getOperand(0))) { addFullAddress(BuildMI(BB, X86::MOV8mi, 5), BaseReg, Scale, IndexReg, Disp).addImm(CB->getValue()); - } else { - if (Class == cLong) { - unsigned ValReg = getReg(I.getOperand(0)); - addFullAddress(BuildMI(BB, X86::MOV32mr, 5), - BaseReg, Scale, IndexReg, Disp).addReg(ValReg); - addFullAddress(BuildMI(BB, X86::MOV32mr, 5), - BaseReg, Scale, IndexReg, Disp+4).addReg(ValReg+1); + } else if (ConstantFP *CFP = dyn_cast<ConstantFP>(I.getOperand(0))) { + // Store constant FP values with integer instructions to avoid having to + // load the constants from the constant pool then do a store. + if (CFP->getType() == Type::FloatTy) { + union { + unsigned I; + float F; + } V; + V.F = CFP->getValue(); + addFullAddress(BuildMI(BB, X86::MOV32mi, 5), + BaseReg, Scale, IndexReg, Disp).addImm(V.I); } else { - unsigned ValReg = getReg(I.getOperand(0)); - static const unsigned Opcodes[] = { - X86::MOV8mr, X86::MOV16mr, X86::MOV32mr, X86::FST32m - }; - unsigned Opcode = Opcodes[Class]; - if (ValTy == Type::DoubleTy) Opcode = X86::FST64m; - addFullAddress(BuildMI(BB, Opcode, 1+4), - BaseReg, Scale, IndexReg, Disp).addReg(ValReg); + union { + uint64_t I; + double F; + } V; + V.F = CFP->getValue(); + addFullAddress(BuildMI(BB, X86::MOV32mi, 5), + BaseReg, Scale, IndexReg, Disp).addImm((unsigned)V.I); + addFullAddress(BuildMI(BB, X86::MOV32mi, 5), + BaseReg, Scale, IndexReg, Disp+4).addImm( + unsigned(V.I >> 32)); } + + } else if (Class == cLong) { + unsigned ValReg = getReg(I.getOperand(0)); + addFullAddress(BuildMI(BB, X86::MOV32mr, 5), + BaseReg, Scale, IndexReg, Disp).addReg(ValReg); + addFullAddress(BuildMI(BB, X86::MOV32mr, 5), + BaseReg, Scale, IndexReg, Disp+4).addReg(ValReg+1); + } else { + unsigned ValReg = getReg(I.getOperand(0)); + static const unsigned Opcodes[] = { + X86::MOV8mr, X86::MOV16mr, X86::MOV32mr, X86::FST32m + }; + unsigned Opcode = Opcodes[Class]; + if (ValTy == Type::DoubleTy) Opcode = X86::FST64m; + addFullAddress(BuildMI(BB, Opcode, 1+4), + BaseReg, Scale, IndexReg, Disp).addReg(ValReg); } } |

