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| author | Craig Topper <craig.topper@gmail.com> | 2016-09-21 03:58:41 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2016-09-21 03:58:41 +0000 |
| commit | a27f54b4d9ae684be3c040058aafdbcbf5c6d92c (patch) | |
| tree | f35b37954abb6e3559be8eff5cc2a9053cbd5a9c /llvm/lib/Target | |
| parent | 225d8e45d46e5b43444233e63ae1e74c432b2a0d (diff) | |
| download | bcm5719-llvm-a27f54b4d9ae684be3c040058aafdbcbf5c6d92c.tar.gz bcm5719-llvm-a27f54b4d9ae684be3c040058aafdbcbf5c6d92c.zip | |
[AVX-512] Simplify handling of INTR_TYPE_1OP_MASK_RM to remove support for the second opcode since its never used. This makes it consistent with INTR_TYPE_2OP_MASK_RM and INTR_TYPE_3OP_MASK_RM.
And even if it was used we were passing the same operands to both so it wouldn't make sense to have two opcodes.
llvm-svn: 282051
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 8 |
1 files changed, 1 insertions, 7 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 8af1dcc89bd..19e010a7818 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -17645,13 +17645,7 @@ static SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, const X86Subtarget &Subtarget DAG.getConstant(X86::STATIC_ROUNDING::CUR_DIRECTION, dl, MVT::i32); else RoundingMode = Op.getOperand(4); - unsigned IntrWithRoundingModeOpcode = IntrData->Opc1; - if (IntrWithRoundingModeOpcode != 0) - if (cast<ConstantSDNode>(RoundingMode)->getZExtValue() != - X86::STATIC_ROUNDING::CUR_DIRECTION) - return getVectorMaskingNode(DAG.getNode(IntrWithRoundingModeOpcode, - dl, Op.getValueType(), Src, RoundingMode), - Mask, PassThru, Subtarget, DAG); + assert(IntrData->Opc1 == 0 && "Unexpected second opcode!"); return getVectorMaskingNode(DAG.getNode(IntrData->Opc0, dl, VT, Src, RoundingMode), Mask, PassThru, Subtarget, DAG); |
