Fix more MC layering violations.

llvm-svn: 135979

1 files changed, 9 insertions, 2 deletions

diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 8eeca013ffb..6883fcbe2e3 100644
--- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -153,6 +153,11 @@ public:
 };
 } // end anonymous namespace
 
+namespace llvm {
+  // FIXME: TableGen this?
+  extern MCRegisterClass ARMMCRegisterClasses[]; // In ARMGenRegisterInfo.inc.
+}
+
 namespace {
 
 /// ARMOperand - Instances of this class represent a parsed ARM machine
@@ -971,9 +976,11 @@ public:
                 SMLoc StartLoc, SMLoc EndLoc) {
     KindTy Kind = RegisterList;
 
-    if (ARM::DPRRegClass.contains(Regs.front().first))
+    if (llvm::ARMMCRegisterClasses[ARM::DPRRegClassID].
+        contains(Regs.front().first))
       Kind = DPRRegisterList;
-    else if (ARM::SPRRegClass.contains(Regs.front().first))
+    else if (llvm::ARMMCRegisterClasses[ARM::SPRRegClassID].
+             contains(Regs.front().first))
       Kind = SPRRegisterList;
 
     ARMOperand *Op = new ARMOperand(Kind);