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| author | Craig Topper <craig.topper@gmail.com> | 2016-06-14 03:13:00 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2016-06-14 03:13:00 +0000 |
| commit | 99e30e6a6624109b6b8d06d5d1f95c87bb88ca92 (patch) | |
| tree | 30fabbc67af6785e44a3037c8d3a1fc4980e30fd /llvm/lib/Target | |
| parent | ddab3953977c572045fa143c369b2db442458037 (diff) | |
| download | bcm5719-llvm-99e30e6a6624109b6b8d06d5d1f95c87bb88ca92.tar.gz bcm5719-llvm-99e30e6a6624109b6b8d06d5d1f95c87bb88ca92.zip | |
[AVX512] Use MOVZX32 instead of MOVZ16 for loading single v8/v4/v2/v1 masks when KMOVB is not available. This has better behavior with respect to partial register stalls since it won't need to preserve the upper 16-bits of the GPR.
llvm-svn: 272626
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrAVX512.td | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86InstrAVX512.td b/llvm/lib/Target/X86/X86InstrAVX512.td index 8419448bd90..bea6e622d27 100644 --- a/llvm/lib/Target/X86/X86InstrAVX512.td +++ b/llvm/lib/Target/X86/X86InstrAVX512.td @@ -2050,18 +2050,18 @@ let Predicates = [HasAVX512, NoDQI] in { sub_8bit))>; def : Pat<(v8i1 (load addr:$src)), - (COPY_TO_REGCLASS (MOVZX16rm8 addr:$src), VK8)>; + (COPY_TO_REGCLASS (MOVZX32rm8 addr:$src), VK8)>; def : Pat<(v2i1 (load addr:$src)), - (COPY_TO_REGCLASS (MOVZX16rm8 addr:$src), VK2)>; + (COPY_TO_REGCLASS (MOVZX32rm8 addr:$src), VK2)>; def : Pat<(v4i1 (load addr:$src)), - (COPY_TO_REGCLASS (MOVZX16rm8 addr:$src), VK4)>; + (COPY_TO_REGCLASS (MOVZX32rm8 addr:$src), VK4)>; } let Predicates = [HasAVX512] in { def : Pat<(store (i16 (bitconvert (v16i1 VK16:$src))), addr:$dst), (KMOVWmk addr:$dst, VK16:$src)>; def : Pat<(i1 (load addr:$src)), - (COPY_TO_REGCLASS (AND16ri (MOVZX16rm8 addr:$src), (i16 1)), VK1)>; + (COPY_TO_REGCLASS (AND32ri (MOVZX32rm8 addr:$src), (i32 1)), VK1)>; def : Pat<(v16i1 (bitconvert (i16 (load addr:$src)))), (KMOVWkm addr:$src)>; } |
