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| author | Jan Vesely <jan.vesely@rutgers.edu> | 2016-07-04 19:45:00 +0000 |
|---|---|---|
| committer | Jan Vesely <jan.vesely@rutgers.edu> | 2016-07-04 19:45:00 +0000 |
| commit | 991dfd7b07011df1e403dfdfee0f8904814995d7 (patch) | |
| tree | 07a15864ffc55f63842c26c301acf04ac0d65fc3 /llvm/lib/Target | |
| parent | 79008a3cc4fe086d06c349fc975f5256aae753ae (diff) | |
| download | bcm5719-llvm-991dfd7b07011df1e403dfdfee0f8904814995d7.tar.gz bcm5719-llvm-991dfd7b07011df1e403dfdfee0f8904814995d7.zip | |
AMDGPU/R600: Add indentation to VTX and TEX fetch asm strings
These are printed as part of Fetch clauses.
Differential Revision: http://reviews.llvm.org/D21730
llvm-svn: 274517
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/R600Instructions.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/R600Instructions.td b/llvm/lib/Target/AMDGPU/R600Instructions.td index 431f923f70c..e10cb22fb82 100644 --- a/llvm/lib/Target/AMDGPU/R600Instructions.td +++ b/llvm/lib/Target/AMDGPU/R600Instructions.td @@ -284,7 +284,7 @@ class EG_CF_RAT <bits <8> cfinst, bits <6> ratinst, bits<4> ratid, bits<4> mask, } class VTX_READ <string name, bits<8> buffer_id, dag outs, list<dag> pattern> - : InstR600ISA <outs, (ins MEMxi:$src_gpr), name, pattern>, + : InstR600ISA <outs, (ins MEMxi:$src_gpr), !strconcat(" ", name), pattern>, VTX_WORD1_GPR { // Static fields @@ -860,7 +860,7 @@ class R600_TEX <bits<11> inst, string opName> : i32imm:$RESOURCE_ID, i32imm:$SAMPLER_ID, CT:$COORD_TYPE_X, CT:$COORD_TYPE_Y, CT:$COORD_TYPE_Z, CT:$COORD_TYPE_W), - !strconcat(opName, + !strconcat(" ", opName, " $DST_GPR.$DST_SEL_X$DST_SEL_Y$DST_SEL_Z$DST_SEL_W, " "$SRC_GPR.$srcx$srcy$srcz$srcw " "RID:$RESOURCE_ID SID:$SAMPLER_ID " |
