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| author | Manman Ren <mren@apple.com> | 2012-06-29 00:54:20 +0000 | 
|---|---|---|
| committer | Manman Ren <mren@apple.com> | 2012-06-29 00:54:20 +0000 | 
| commit | 98a5bf24a9abb4b4fc391c07152968bbf77f7a25 (patch) | |
| tree | 9bb58d6665ba135d3bfee0e9a68d5c8be6280815 /llvm/lib/Target | |
| parent | 6bd56ca836e7e8866306d6ba7bb3c3575c01cf69 (diff) | |
| download | bcm5719-llvm-98a5bf24a9abb4b4fc391c07152968bbf77f7a25.tar.gz bcm5719-llvm-98a5bf24a9abb4b4fc391c07152968bbf77f7a25.zip  | |
X86: add more GATHER intrinsics in LLVM
Corrected type for index of llvm.x86.avx2.gather.d.pd.256
  from 256-bit to 128-bit.
Corrected types for src|dst|mask of llvm.x86.avx2.gather.q.ps.256
  from 256-bit to 128-bit.
Support the following intrinsics:
  llvm.x86.avx2.gather.d.q, llvm.x86.avx2.gather.q.q
  llvm.x86.avx2.gather.d.q.256, llvm.x86.avx2.gather.q.q.256
  llvm.x86.avx2.gather.d.d, llvm.x86.avx2.gather.q.d
  llvm.x86.avx2.gather.d.d.256, llvm.x86.avx2.gather.q.d.256
llvm-svn: 159402
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp | 28 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 16 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.td | 6 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrSSE.td | 33 | 
4 files changed, 60 insertions, 23 deletions
diff --git a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp index b13e1ca41c5..d58e36c8038 100644 --- a/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp +++ b/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp @@ -506,18 +506,26 @@ static bool translateRMMemory(MCInst &mcInst, InternalInstruction &insn,      //   We can tell whether it is VSIB or SIB after instruction ID is decoded,      //   but instruction ID may not be decoded yet when calling readSIB.      uint32_t Opcode = mcInst.getOpcode(); -    bool IsGather = (Opcode == X86::VGATHERDPDrm || -                     Opcode == X86::VGATHERQPDrm || -                     Opcode == X86::VGATHERDPSrm || -                     Opcode == X86::VGATHERQPSrm); -    bool IsGatherY = (Opcode == X86::VGATHERDPDYrm || -                      Opcode == X86::VGATHERQPDYrm || -                      Opcode == X86::VGATHERDPSYrm || -                      Opcode == X86::VGATHERQPSYrm); -    if (IsGather || IsGatherY) { +    bool IndexIs128 = (Opcode == X86::VGATHERDPDrm || +                       Opcode == X86::VGATHERDPDYrm || +                       Opcode == X86::VGATHERQPDrm || +                       Opcode == X86::VGATHERDPSrm || +                       Opcode == X86::VGATHERQPSrm || +                       Opcode == X86::VPGATHERDQrm || +                       Opcode == X86::VPGATHERDQYrm || +                       Opcode == X86::VPGATHERQQrm || +                       Opcode == X86::VPGATHERDDrm || +                       Opcode == X86::VPGATHERQDrm); +    bool IndexIs256 = (Opcode == X86::VGATHERQPDYrm || +                       Opcode == X86::VGATHERDPSYrm || +                       Opcode == X86::VGATHERQPSYrm || +                       Opcode == X86::VPGATHERQQYrm || +                       Opcode == X86::VPGATHERDDYrm || +                       Opcode == X86::VPGATHERQDYrm); +    if (IndexIs128 || IndexIs256) {        unsigned IndexOffset = insn.sibIndex -                           (insn.addressSize == 8 ? SIB_INDEX_RAX:SIB_INDEX_EAX); -      SIBIndex IndexBase = IsGatherY ? SIB_INDEX_YMM0 : SIB_INDEX_XMM0; +      SIBIndex IndexBase = IndexIs256 ? SIB_INDEX_YMM0 : SIB_INDEX_XMM0;        insn.sibIndex = (SIBIndex)(IndexBase +                              (insn.sibIndex == SIB_INDEX_NONE ? 4 : IndexOffset));      } diff --git a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp index ea9e5bcf180..cad90f48cb8 100644 --- a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp +++ b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -2011,6 +2011,22 @@ SDNode *X86DAGToDAGISel::Select(SDNode *Node) {        return SelectGather(Node, X86::VGATHERQPSrm);      case Intrinsic::x86_avx2_gather_q_ps_256:        return SelectGather(Node, X86::VGATHERQPSYrm); +    case Intrinsic::x86_avx2_gather_d_q: +      return SelectGather(Node, X86::VPGATHERDQrm); +    case Intrinsic::x86_avx2_gather_d_q_256: +      return SelectGather(Node, X86::VPGATHERDQYrm); +    case Intrinsic::x86_avx2_gather_q_q: +      return SelectGather(Node, X86::VPGATHERQQrm); +    case Intrinsic::x86_avx2_gather_q_q_256: +      return SelectGather(Node, X86::VPGATHERQQYrm); +    case Intrinsic::x86_avx2_gather_d_d: +      return SelectGather(Node, X86::VPGATHERDDrm); +    case Intrinsic::x86_avx2_gather_d_d_256: +      return SelectGather(Node, X86::VPGATHERDDYrm); +    case Intrinsic::x86_avx2_gather_q_d: +      return SelectGather(Node, X86::VPGATHERQDrm); +    case Intrinsic::x86_avx2_gather_q_d_256: +      return SelectGather(Node, X86::VPGATHERQDYrm);      }      break;    } diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td index 0023424e660..0f7b787c1bd 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.td +++ b/llvm/lib/Target/X86/X86InstrInfo.td @@ -325,12 +325,10 @@ def f128mem : X86MemOperand<"printf128mem"> {    let ParserMatchClass = X86Mem128AsmOperand; }  def f256mem : X86MemOperand<"printf256mem">{     let ParserMatchClass = X86Mem256AsmOperand; } -def v128mem : Operand<iPTR> { -  let PrintMethod = "printf128mem"; +def v128mem : X86MemOperand<"printf128mem"> {    let MIOperandInfo = (ops ptr_rc, i8imm, VR128, i32imm, i8imm);    let ParserMatchClass = X86Mem128AsmOperand; } -def v256mem : Operand<iPTR> { -  let PrintMethod = "printf256mem"; +def v256mem : X86MemOperand<"printf256mem"> {    let MIOperandInfo = (ops ptr_rc, i8imm, VR256, i32imm, i8imm);    let ParserMatchClass = X86Mem256AsmOperand; }  } diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td index 8974d453522..ad8d15dab36 100644 --- a/llvm/lib/Target/X86/X86InstrSSE.td +++ b/llvm/lib/Target/X86/X86InstrSSE.td @@ -7997,37 +7997,52 @@ defm VPSRAVD : avx2_var_shift<0x46, "vpsravd", sra, v4i32, v8i32>;  //===----------------------------------------------------------------------===//  // VGATHER - GATHER Operations -// -//            [(set VR128:$dst, (IntGather128 VR128:$src1, addr:$src2, VR128:$idx, -//                               VR128:$mask, (i8 imm:$sc)))]>, VEX_4VOp3; -//            [(set VR256:$dst, (IntGather256 VR256:$src1, addr:$src2, VR256:$idx, -//                               VR256:$mask, (i8 imm:$sc)))]>, VEX_4VOp3;  multiclass avx2_gather<bits<8> opc, string OpcodeStr, +                       RegisterClass RC256, X86MemOperand memop256,                         Intrinsic IntGather128, Intrinsic IntGather256> {    def rm  : AVX28I<opc, MRMSrcMem, (outs VR128:$dst),              (ins VR128:$src1, v128mem:$src2, VR128:$mask),              !strconcat(OpcodeStr,                "\t{$src1, $src2, $mask|$mask, $src2, $src1}"),              []>, VEX_4VOp3; -  def Yrm : AVX28I<opc, MRMSrcMem, (outs VR256:$dst), -            (ins VR256:$src1, v256mem:$src2, VR256:$mask), +  def Yrm : AVX28I<opc, MRMSrcMem, (outs RC256:$dst), +            (ins RC256:$src1, memop256:$src2, RC256:$mask),              !strconcat(OpcodeStr,                "\t{$src1, $src2, $mask|$mask, $src2, $src1}"), -            []>, VEX_4VOp3; +            []>, VEX_4VOp3, VEX_L;  } -//let Constraints = "$src1 = $dst, $mask = $mask_wb" in {  let Constraints = "$src1 = $dst" in {    defm VGATHERDPD : avx2_gather<0x92, "vgatherdpd", +                                VR256, v128mem,                                  int_x86_avx2_gather_d_pd,                                  int_x86_avx2_gather_d_pd_256>, VEX_W;    defm VGATHERQPD : avx2_gather<0x93, "vgatherqpd", +                                VR256, v256mem,                                  int_x86_avx2_gather_q_pd,                                  int_x86_avx2_gather_q_pd_256>, VEX_W;    defm VGATHERDPS : avx2_gather<0x92, "vgatherdps", +                                VR256, v256mem,                                  int_x86_avx2_gather_d_ps,                                  int_x86_avx2_gather_d_ps_256>;    defm VGATHERQPS : avx2_gather<0x93, "vgatherqps", +                                VR128, v256mem,                                  int_x86_avx2_gather_q_ps,                                  int_x86_avx2_gather_q_ps_256>; +  defm VPGATHERDQ : avx2_gather<0x90, "vpgatherdq", +                                VR256, v128mem, +                                int_x86_avx2_gather_d_q, +                                int_x86_avx2_gather_d_q_256>, VEX_W; +  defm VPGATHERQQ : avx2_gather<0x91, "vpgatherqq", +                                VR256, v256mem, +                                int_x86_avx2_gather_q_q, +                                int_x86_avx2_gather_q_q_256>, VEX_W; +  defm VPGATHERDD : avx2_gather<0x90, "vpgatherdd", +                                VR256, v256mem, +                                int_x86_avx2_gather_d_d, +                                int_x86_avx2_gather_d_d_256>; +  defm VPGATHERQD : avx2_gather<0x91, "vpgatherqd", +                                VR128, v256mem, +                                int_x86_avx2_gather_q_d, +                                int_x86_avx2_gather_q_d_256>;  }  | 

