Remove a bunch more SparcV9 specific stuff

llvm-svn: 28093

10 files changed, 10 insertions, 42 deletions

diff --git a/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp b/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp
index 435e8e84d89..1e360676b6d 100644
--- a/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp
+++ b/llvm/lib/Target/Alpha/AlphaAsmPrinter.cpp
@@ -77,7 +77,7 @@ FunctionPass *llvm::createAlphaCodePrinterPass (std::ostream &o,
 void AlphaAsmPrinter::printOperand(const MachineInstr *MI, int opNum)
 {
   const MachineOperand &MO = MI->getOperand(opNum);
-  if (MO.getType() == MachineOperand::MO_MachineRegister) {
+  if (MO.getType() == MachineOperand::MO_VirtualRegister) {
     assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physreg??");
     O << TM.getRegisterInfo()->get(MO.getReg()).Name;
   } else if (MO.isImmediate()) {
@@ -94,12 +94,6 @@ void AlphaAsmPrinter::printOp(const MachineOperand &MO, bool IsCallOp) {
 
   switch (MO.getType()) {
   case MachineOperand::MO_VirtualRegister:
-    if (Value *V = MO.getVRegValueOrNull()) {
-      O << "<" << V->getName() << ">";
-      return;
-    }
-    // FALLTHROUGH
-  case MachineOperand::MO_MachineRegister:
     O << RI.get(MO.getReg()).Name;
     return;
 
diff --git a/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp b/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp
index 8f6310e4398..85c9da8e642 100644
--- a/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp
+++ b/llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp
@@ -263,7 +263,8 @@ void AlphaRegisterInfo::emitPrologue(MachineFunction &MF) const {
     .addReg(Alpha::R29).addImm(curgpdist);
 
   //evil const_cast until MO stuff setup to handle const
-  BuildMI(MBB, MBBI, Alpha::ALTENT, 1).addGlobalAddress(const_cast<Function*>(MF.getFunction()), true);
+  BuildMI(MBB, MBBI, Alpha::ALTENT, 1)
+    .addGlobalAddress(const_cast<Function*>(MF.getFunction()));
 
   // Get the number of bytes to allocate from the FrameInfo
   long NumBytes = MFI->getStackSize();
diff --git a/llvm/lib/Target/IA64/IA64AsmPrinter.cpp b/llvm/lib/Target/IA64/IA64AsmPrinter.cpp
index 6895d328da6..087fcc32d80 100644
--- a/llvm/lib/Target/IA64/IA64AsmPrinter.cpp
+++ b/llvm/lib/Target/IA64/IA64AsmPrinter.cpp
@@ -66,7 +66,7 @@ namespace {
     // This method is used by the tablegen'erated instruction printer.
     void printOperand(const MachineInstr *MI, unsigned OpNo){
       const MachineOperand &MO = MI->getOperand(OpNo);
-      if (MO.getType() == MachineOperand::MO_MachineRegister) {
+      if (MO.getType() == MachineOperand::MO_VirtualRegister) {
         assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physref??");
         //XXX Bug Workaround: See note in Printer::doInitialization about %.
         O << TM.getRegisterInfo()->get(MO.getReg()).Name;
@@ -174,12 +174,6 @@ void IA64AsmPrinter::printOp(const MachineOperand &MO,
   const MRegisterInfo &RI = *TM.getRegisterInfo();
   switch (MO.getType()) {
   case MachineOperand::MO_VirtualRegister:
-    if (Value *V = MO.getVRegValueOrNull()) {
-      O << "<" << V->getName() << ">";
-      return;
-    }
-    // FALLTHROUGH
-  case MachineOperand::MO_MachineRegister:
     O << RI.get(MO.getReg()).Name;
     return;
 
diff --git a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
index 2cf10a2f9d4..e85ce9fd6fd 100644
--- a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -86,7 +86,7 @@ namespace {
 
     void printOperand(const MachineInstr *MI, unsigned OpNo) {
       const MachineOperand &MO = MI->getOperand(OpNo);
-      if (MO.getType() == MachineOperand::MO_MachineRegister) {
+      if (MO.getType() == MachineOperand::MO_VirtualRegister) {
         assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physreg??");
         O << TM.getRegisterInfo()->get(MO.getReg()).Name;
       } else if (MO.isImmediate()) {
@@ -353,13 +353,6 @@ void PPCAsmPrinter::printOp(const MachineOperand &MO) {
   int new_symbol;
 
   switch (MO.getType()) {
-  case MachineOperand::MO_VirtualRegister:
-    if (Value *V = MO.getVRegValueOrNull()) {
-      O << "<" << V->getName() << ">";
-      return;
-    }
-    // FALLTHROUGH
-  case MachineOperand::MO_MachineRegister:
     O << RI.get(MO.getReg()).Name;
     return;
 
diff --git a/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp b/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
index ced2b3dd0c1..2d81bbd6700 100644
--- a/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
+++ b/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
@@ -147,12 +147,6 @@ void SparcAsmPrinter::printOperand(const MachineInstr *MI, int opNum) {
   }
   switch (MO.getType()) {
   case MachineOperand::MO_VirtualRegister:
-    if (Value *V = MO.getVRegValueOrNull()) {
-      O << "<" << V->getName() << ">";
-      break;
-    }
-    // FALLTHROUGH
-  case MachineOperand::MO_MachineRegister:
     if (MRegisterInfo::isPhysicalRegister(MO.getReg()))
       O << "%" << LowercaseString (RI.get(MO.getReg()).Name);
     else
@@ -195,8 +189,7 @@ void SparcAsmPrinter::printMemOperand(const MachineInstr *MI, int opNum,
   
   MachineOperand::MachineOperandType OpTy = MI->getOperand(opNum+1).getType();
   
-  if ((OpTy == MachineOperand::MO_VirtualRegister ||
-       OpTy == MachineOperand::MO_MachineRegister) &&
+  if (OpTy == MachineOperand::MO_VirtualRegister &&
       MI->getOperand(opNum+1).getReg() == SP::G0)
     return;   // don't print "+%g0"
   if ((OpTy == MachineOperand::MO_SignExtendedImmed ||
diff --git a/llvm/lib/Target/X86/X86ATTAsmPrinter.cpp b/llvm/lib/Target/X86/X86ATTAsmPrinter.cpp
index b7f5b6c8a69..5283ddd79e3 100755
--- a/llvm/lib/Target/X86/X86ATTAsmPrinter.cpp
+++ b/llvm/lib/Target/X86/X86ATTAsmPrinter.cpp
@@ -109,7 +109,6 @@ void X86ATTAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
   const MRegisterInfo &RI = *TM.getRegisterInfo();
   switch (MO.getType()) {
   case MachineOperand::MO_VirtualRegister:
-  case MachineOperand::MO_MachineRegister:
     assert(MRegisterInfo::isPhysicalRegister(MO.getReg()) &&
            "Virtual registers should not make it this far!");
     O << '%';
diff --git a/llvm/lib/Target/X86/X86InstrBuilder.h b/llvm/lib/Target/X86/X86InstrBuilder.h
index 95d7f927d8f..6a3c116f6d4 100644
--- a/llvm/lib/Target/X86/X86InstrBuilder.h
+++ b/llvm/lib/Target/X86/X86InstrBuilder.h
@@ -93,7 +93,7 @@ inline const MachineInstrBuilder &addFullAddress(const MachineInstrBuilder &MIB,
     assert (0);
   MIB.addZImm(AM.Scale).addReg(AM.IndexReg);
   if (AM.GV)
-    return MIB.addGlobalAddress(AM.GV, false, AM.Disp);
+    return MIB.addGlobalAddress(AM.GV, AM.Disp);
   else
     return MIB.addSImm(AM.Disp);
 }
diff --git a/llvm/lib/Target/X86/X86IntelAsmPrinter.cpp b/llvm/lib/Target/X86/X86IntelAsmPrinter.cpp
index f3213b64f41..f9093da36d8 100755
--- a/llvm/lib/Target/X86/X86IntelAsmPrinter.cpp
+++ b/llvm/lib/Target/X86/X86IntelAsmPrinter.cpp
@@ -115,12 +115,6 @@ void X86IntelAsmPrinter::printOp(const MachineOperand &MO,
   const MRegisterInfo &RI = *TM.getRegisterInfo();
   switch (MO.getType()) {
   case MachineOperand::MO_VirtualRegister:
-    if (Value *V = MO.getVRegValueOrNull()) {
-      O << "<" << V->getName() << ">";
-      return;
-    }
-    // FALLTHROUGH
-  case MachineOperand::MO_MachineRegister:
     if (MRegisterInfo::isPhysicalRegister(MO.getReg()))
       O << RI.get(MO.getReg()).Name;
     else
diff --git a/llvm/lib/Target/X86/X86IntelAsmPrinter.h b/llvm/lib/Target/X86/X86IntelAsmPrinter.h
index b408ea3903b..28ccfc9ed09 100755
--- a/llvm/lib/Target/X86/X86IntelAsmPrinter.h
+++ b/llvm/lib/Target/X86/X86IntelAsmPrinter.h
@@ -37,8 +37,8 @@ struct X86IntelAsmPrinter : public X86SharedAsmPrinter {
   void printOperand(const MachineInstr *MI, unsigned OpNo,
                     const char *Modifier = 0) {
     const MachineOperand &MO = MI->getOperand(OpNo);
-    if (MO.getType() == MachineOperand::MO_MachineRegister) {
-      assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physref??");
+    if (MO.getType() == MachineOperand::MO_VirtualRegister) {
+      assert(MRegisterInfo::isPhysicalRegister(MO.getReg()) && "Not physreg??");
       O << TM.getRegisterInfo()->get(MO.getReg()).Name;
     } else {
       printOp(MO, Modifier);
diff --git a/llvm/lib/Target/X86/X86RegisterInfo.cpp b/llvm/lib/Target/X86/X86RegisterInfo.cpp
index 383529a0eb4..a9e345fc68a 100644
--- a/llvm/lib/Target/X86/X86RegisterInfo.cpp
+++ b/llvm/lib/Target/X86/X86RegisterInfo.cpp
@@ -150,7 +150,7 @@ static MachineInstr *MakeMIInst(unsigned Opcode, unsigned FrameIndex,
   else if (MI->getOperand(1).isGlobalAddress())
     return addFrameReference(BuildMI(Opcode, 5), FrameIndex)
       .addGlobalAddress(MI->getOperand(1).getGlobal(),
-                        false, MI->getOperand(1).getOffset());
+                        MI->getOperand(1).getOffset());
   else if (MI->getOperand(1).isJumpTableIndex())
     return addFrameReference(BuildMI(Opcode, 5), FrameIndex)
       .addJumpTableIndex(MI->getOperand(1).getJumpTableIndex());