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| author | Reed Kotler <rkotler@mips.com> | 2012-12-20 05:09:15 +0000 |
|---|---|---|
| committer | Reed Kotler <rkotler@mips.com> | 2012-12-20 05:09:15 +0000 |
| commit | 92fc33bc97fe75ebea84822c410642e1592feb52 (patch) | |
| tree | 2d3f113bf84db1ec3b70b2569cb035b96ae707a0 /llvm/lib/Target | |
| parent | 64e25ce53d6f533842271a593942258aadaca05b (diff) | |
| download | bcm5719-llvm-92fc33bc97fe75ebea84822c410642e1592feb52.tar.gz bcm5719-llvm-92fc33bc97fe75ebea84822c410642e1592feb52.zip | |
This assert is overly restrictive and does not work for mips16.
llvm-svn: 170667
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsISelLowering.cpp | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp index 3fad6eec926..e3abd3e1af4 100644 --- a/llvm/lib/Target/Mips/MipsISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp @@ -1048,7 +1048,6 @@ LowerOperation(SDValue Op, SelectionDAG &DAG) const static unsigned AddLiveIn(MachineFunction &MF, unsigned PReg, const TargetRegisterClass *RC) { - assert(RC->contains(PReg) && "Not the correct regclass!"); unsigned VReg = MF.getRegInfo().createVirtualRegister(RC); MF.getRegInfo().addLiveIn(PReg, VReg); return VReg; |
