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authorChad Rosier <mcrosier@apple.com>2012-05-11 18:51:55 +0000
committerChad Rosier <mcrosier@apple.com>2012-05-11 18:51:55 +0000
commit90f9afe659d0c6aebc6ad5d62ae6ad1913802f2c (patch)
tree0e4d8c7d24bc7e41b562e90aa77df0da3745a47f /llvm/lib/Target
parent923886ce2c7e4142e6335df3b236f58d13f9d967 (diff)
downloadbcm5719-llvm-90f9afe659d0c6aebc6ad5d62ae6ad1913802f2c.tar.gz
bcm5719-llvm-90f9afe659d0c6aebc6ad5d62ae6ad1913802f2c.zip
[fast-isel] Cleaner fix for when we're unable to handle a non-double multi-reg
retval. Hoists check before emitting the call to avoid unnecessary work. rdar://11430407 PR12796 llvm-svn: 156628
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/ARM/ARMFastISel.cpp25
1 files changed, 21 insertions, 4 deletions
diff --git a/llvm/lib/Target/ARM/ARMFastISel.cpp b/llvm/lib/Target/ARM/ARMFastISel.cpp
index f49a5d3f83c..02bb5f41fea 100644
--- a/llvm/lib/Target/ARM/ARMFastISel.cpp
+++ b/llvm/lib/Target/ARM/ARMFastISel.cpp
@@ -2014,7 +2014,8 @@ bool ARMFastISel::FinishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs,
// Finally update the result.
UpdateValueMap(I, ResultReg);
- } else if (RVLocs.size() == 1) {
+ } else {
+ assert(RVLocs.size() == 1 &&"Can't handle non-double multi-reg retvals!");
EVT CopyVT = RVLocs[0].getValVT();
// Special handling for extended integers.
@@ -2030,9 +2031,6 @@ bool ARMFastISel::FinishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs,
// Finally update the result.
UpdateValueMap(I, ResultReg);
- } else {
- // Can't handle non-double multi-reg retvals.
- return false;
}
}
@@ -2144,6 +2142,15 @@ bool ARMFastISel::ARMEmitLibcall(const Instruction *I, RTLIB::Libcall Call) {
// TODO: For now if we have long calls specified we don't handle the call.
if (EnableARMLongCalls) return false;
+ // Can't handle non-double multi-reg retvals.
+ if (RetVT != MVT::isVoid && RetVT != MVT::i32) {
+ SmallVector<CCValAssign, 16> RVLocs;
+ CCState CCInfo(CC, false, *FuncInfo.MF, TM, RVLocs, *Context);
+ CCInfo.AnalyzeCallResult(RetVT, CCAssignFnForCall(CC, true));
+ if (RVLocs.size() >= 2 && RetVT != MVT::f64)
+ return false;
+ }
+
// Set up the argument vectors.
SmallVector<Value*, 8> Args;
SmallVector<unsigned, 8> ArgRegs;
@@ -2247,6 +2254,16 @@ bool ARMFastISel::SelectCall(const Instruction *I,
// TODO: For now if we have long calls specified we don't handle the call.
if (EnableARMLongCalls) return false;
+ // Can't handle non-double multi-reg retvals.
+ if (RetVT != MVT::isVoid && RetVT != MVT::i1 && RetVT != MVT::i8 &&
+ RetVT != MVT::i16 && RetVT != MVT::i32) {
+ SmallVector<CCValAssign, 16> RVLocs;
+ CCState CCInfo(CC, false, *FuncInfo.MF, TM, RVLocs, *Context);
+ CCInfo.AnalyzeCallResult(RetVT, CCAssignFnForCall(CC, true));
+ if (RVLocs.size() >= 2 && RetVT != MVT::f64)
+ return false;
+ }
+
// Set up the argument vectors.
SmallVector<Value*, 8> Args;
SmallVector<unsigned, 8> ArgRegs;
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