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| author | Craig Topper <craig.topper@gmail.com> | 2016-06-05 06:29:12 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2016-06-05 06:29:12 +0000 |
| commit | 8eeda57a40e68dbed7040b258aa9506a0e5d6f8d (patch) | |
| tree | 51e9b2bf0fdf96fcbfcfd99fa6dcfcbe24515aaa /llvm/lib/Target | |
| parent | 5a315d4613442dd611aa52e86a1f3d454ba70527 (diff) | |
| download | bcm5719-llvm-8eeda57a40e68dbed7040b258aa9506a0e5d6f8d.tar.gz bcm5719-llvm-8eeda57a40e68dbed7040b258aa9506a0e5d6f8d.zip | |
[AVX512] Add support for lowering PALIGNR for v64i8.
Could do this for other types to, but this is what's needed to replace the instrinsic with native IR in clang.
llvm-svn: 271828
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 96e0c5564fc..433c46a8e1b 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -11770,6 +11770,11 @@ static SDValue lowerV64I8VectorShuffle(SDValue Op, SDValue V1, SDValue V2, assert(Mask.size() == 64 && "Unexpected mask size for v64 shuffle!"); assert(Subtarget.hasBWI() && "We can only lower v64i8 with AVX-512-BWI!"); + // Try to use byte rotation instructions. + if (SDValue Rotate = lowerVectorShuffleAsByteRotate( + DL, MVT::v64i8, V1, V2, Mask, Subtarget, DAG)) + return Rotate; + // FIXME: Implement direct support for this type! return splitAndLowerVectorShuffle(DL, MVT::v64i8, V1, V2, Mask, DAG); } |
