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authorDaniel Sanders <daniel_l_sanders@apple.com>2017-03-07 19:21:23 +0000
committerDaniel Sanders <daniel_l_sanders@apple.com>2017-03-07 19:21:23 +0000
commit8ebec37d261b9dee5b808b214d96e8792d1ad66b (patch)
treea20f69876f24d51de572607f1dac963444103168 /llvm/lib/Target
parentcf715bd33006599db3b6d472bdf6bbe40a616dd0 (diff)
downloadbcm5719-llvm-8ebec37d261b9dee5b808b214d96e8792d1ad66b.tar.gz
bcm5719-llvm-8ebec37d261b9dee5b808b214d96e8792d1ad66b.zip
Revert r297177: Change LLT constructor string into an LLT-based object ...
More module problems. This time it only showed up in the stage 2 compile of clang-x86_64-linux-selfhost-modules-2 but not the stage 1 compile. Somehow, this change causes the build to need Attributes.gen before it's been generated. llvm-svn: 297188
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/AArch64/AArch64CallLowering.cpp4
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp2
-rw-r--r--llvm/lib/Target/X86/X86CallLowering.cpp5
3 files changed, 5 insertions, 6 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64CallLowering.cpp b/llvm/lib/Target/AArch64/AArch64CallLowering.cpp
index ea831eff654..4ccd6b68397 100644
--- a/llvm/lib/Target/AArch64/AArch64CallLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64CallLowering.cpp
@@ -196,8 +196,8 @@ void AArch64CallLowering::splitToValueTypes(
// FIXME: set split flags if they're actually used (e.g. i128 on AAPCS).
Type *SplitTy = SplitVT.getTypeForEVT(Ctx);
SplitArgs.push_back(
- ArgInfo{MRI.createGenericVirtualRegister(getLLTForType(*SplitTy, DL)),
- SplitTy, OrigArg.Flags, OrigArg.IsFixed});
+ ArgInfo{MRI.createGenericVirtualRegister(LLT{*SplitTy, DL}), SplitTy,
+ OrigArg.Flags, OrigArg.IsFixed});
}
for (unsigned i = 0; i < Offsets.size(); ++i)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
index ce70d150e52..ae5fb358154 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
@@ -50,7 +50,7 @@ unsigned AMDGPUCallLowering::lowerParameterPtr(MachineIRBuilder &MIRBuilder,
const Function &F = *MF.getFunction();
const DataLayout &DL = F.getParent()->getDataLayout();
PointerType *PtrTy = PointerType::get(ParamTy, AMDGPUAS::CONSTANT_ADDRESS);
- LLT PtrType = getLLTForType(*PtrTy, DL);
+ LLT PtrType(*PtrTy, DL);
unsigned DstReg = MRI.createGenericVirtualRegister(PtrType);
unsigned KernArgSegmentPtr =
TRI->getPreloadedValue(MF, SIRegisterInfo::KERNARG_SEGMENT_PTR);
diff --git a/llvm/lib/Target/X86/X86CallLowering.cpp b/llvm/lib/Target/X86/X86CallLowering.cpp
index 4da5d0d61d8..dbb74249634 100644
--- a/llvm/lib/Target/X86/X86CallLowering.cpp
+++ b/llvm/lib/Target/X86/X86CallLowering.cpp
@@ -58,9 +58,8 @@ void X86CallLowering::splitToValueTypes(const ArgInfo &OrigArg,
Type *PartTy = PartVT.getTypeForEVT(Context);
for (unsigned i = 0; i < NumParts; ++i) {
- ArgInfo Info =
- ArgInfo{MRI.createGenericVirtualRegister(getLLTForType(*PartTy, DL)),
- PartTy, OrigArg.Flags};
+ ArgInfo Info = ArgInfo{MRI.createGenericVirtualRegister(LLT{*PartTy, DL}),
+ PartTy, OrigArg.Flags};
SplitArgs.push_back(Info);
PerformArgSplit(Info.Reg, PartVT.getSizeInBits() * i);
}
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