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authorJim Grosbach <grosbach@apple.com>2011-07-22 20:18:21 +0000
committerJim Grosbach <grosbach@apple.com>2011-07-22 20:18:21 +0000
commit8dfcc0bb9211ab8edf83182ae4c702021dd68ed4 (patch)
tree65b5b1d4bbed5410196fd00c0345774ff20e3d46 /llvm/lib/Target
parentd7c8c3530155f9524fe4189dea8b7553b2508faa (diff)
downloadbcm5719-llvm-8dfcc0bb9211ab8edf83182ae4c702021dd68ed4.tar.gz
bcm5719-llvm-8dfcc0bb9211ab8edf83182ae4c702021dd68ed4.zip
ARM assembly parsing and encoding of SMLAL instruction.
Fix parsing of carry-setting variant SMLALS and add tests. llvm-svn: 135797
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index ef611b21e72..1455389ce61 100644
--- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -2153,7 +2153,7 @@ StringRef ARMAsmParser::SplitMnemonic(StringRef Mnemonic,
// First, split out any predication code. Ignore mnemonics we know aren't
// predicated but do have a carry-set and so weren't caught above.
if (Mnemonic != "adcs" && Mnemonic != "bics" && Mnemonic != "movs" &&
- Mnemonic != "muls") {
+ Mnemonic != "muls" && Mnemonic != "smlals") {
unsigned CC = StringSwitch<unsigned>(Mnemonic.substr(Mnemonic.size()-2))
.Case("eq", ARMCC::EQ)
.Case("ne", ARMCC::NE)
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