summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target
diff options
context:
space:
mode:
authorKevin Enderby <enderby@apple.com>2012-05-04 22:02:27 +0000
committerKevin Enderby <enderby@apple.com>2012-05-04 22:02:27 +0000
commit8ce1ada1beb59db2a3a655f3aa9e20020f4a9a77 (patch)
tree83eb8daf005557ee7a7b974e64c7c7966cea20d1 /llvm/lib/Target
parentfd727748bd0aa16a4fac391a34400f46042de751 (diff)
downloadbcm5719-llvm-8ce1ada1beb59db2a3a655f3aa9e20020f4a9a77.tar.gz
bcm5719-llvm-8ce1ada1beb59db2a3a655f3aa9e20020f4a9a77.zip
Fix a bug in the ARM disassembler for wide branch conditional instructions
where the symbolic operand's displacement was incorrectly shifted left by 1. rdar://11387046 llvm-svn: 156212
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index 80b2b235bed..1363b85ee5c 100644
--- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -3016,7 +3016,7 @@ static DecodeStatus DecodeThumbBROperand(MCInst &Inst, unsigned Val,
static DecodeStatus DecodeT2BROperand(MCInst &Inst, unsigned Val,
uint64_t Address, const void *Decoder) {
- if (!tryAddingSymbolicOperand(Address, Address + SignExtend32<22>(Val<<1) + 4,
+ if (!tryAddingSymbolicOperand(Address, Address + SignExtend32<22>(Val) + 4,
true, 4, Inst, Decoder))
Inst.addOperand(MCOperand::CreateImm(SignExtend32<21>(Val)));
return MCDisassembler::Success;
OpenPOWER on IntegriCloud