[WebAssembly] Create new registers instead of reusing old ones in RegStackify.

This avoids some complications updating LiveIntervals to be aware of the new
register lifetimes, because we can just compute new intervals from scratch
rather than describe how the old ones have been changed.

llvm-svn: 260971

1 files changed, 9 insertions, 7 deletions

diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
index 15da0d175f3..e23066c1a92 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
@@ -237,13 +237,13 @@ RematerializeCheapDef(unsigned Reg, MachineOperand &Op, MachineInstr *Def,
 ///
 /// to this:
 ///
-///    Reg = INST ...        // Def (to become the new Insert)
-///    TeeReg, NewReg = TEE_LOCAL_... Reg
+///    DefReg = INST ...     // Def (to become the new Insert)
+///    TeeReg, NewReg = TEE_LOCAL_... DefReg
 ///    INST ..., TeeReg, ... // Insert
 ///    INST ..., NewReg, ...
 ///    INST ..., NewReg, ...
 ///
-/// with Reg and TeeReg stackified. This eliminates a get_local from the
+/// with DefReg and TeeReg stackified. This eliminates a get_local from the
 /// resulting code.
 static MachineInstr *MoveAndTeeForMultiUse(
     unsigned Reg, MachineOperand &Op, MachineInstr *Def, MachineBasicBlock &MBB,
@@ -254,18 +254,20 @@ static MachineInstr *MoveAndTeeForMultiUse(
   const auto *RegClass = MRI.getRegClass(Reg);
   unsigned NewReg = MRI.createVirtualRegister(RegClass);
   unsigned TeeReg = MRI.createVirtualRegister(RegClass);
+  unsigned DefReg = MRI.createVirtualRegister(RegClass);
   MRI.replaceRegWith(Reg, NewReg);
   MachineInstr *Tee = BuildMI(MBB, Insert, Insert->getDebugLoc(),
                               TII->get(GetTeeLocalOpcode(RegClass)), TeeReg)
                           .addReg(NewReg, RegState::Define)
-                          .addReg(Reg);
+                          .addReg(DefReg);
   Op.setReg(TeeReg);
-  Def->getOperand(0).setReg(Reg);
+  Def->getOperand(0).setReg(DefReg);
   LIS.InsertMachineInstrInMaps(Tee);
-  LIS.shrinkToUses(&LIS.getInterval(Reg));
+  LIS.removeInterval(Reg);
   LIS.createAndComputeVirtRegInterval(NewReg);
   LIS.createAndComputeVirtRegInterval(TeeReg);
-  MFI.stackifyVReg(Reg);
+  LIS.createAndComputeVirtRegInterval(DefReg);
+  MFI.stackifyVReg(DefReg);
   MFI.stackifyVReg(TeeReg);
   ImposeStackOrdering(Def);
   ImposeStackOrdering(Tee);