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author | Colin LeMahieu <colinl@codeaurora.org> | 2015-11-09 00:31:07 +0000 |
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committer | Colin LeMahieu <colinl@codeaurora.org> | 2015-11-09 00:31:07 +0000 |
commit | 8a0453e23abf27433b7539b2da2060d2df9fb39c (patch) | |
tree | 33be159623c6ec1440fc54a8ac61285d12d555ab /llvm/lib/Target | |
parent | 87f5e80614a265b07d53cbb3b0ccf23ad090382b (diff) | |
download | bcm5719-llvm-8a0453e23abf27433b7539b2da2060d2df9fb39c.tar.gz bcm5719-llvm-8a0453e23abf27433b7539b2da2060d2df9fb39c.zip |
[AsmParser] Backends can parameterize ASM tokenization.
llvm-svn: 252439
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r-- | llvm/lib/Target/AArch64/AArch64.td | 2 | ||||
-rw-r--r-- | llvm/lib/Target/ARM/ARM.td | 7 | ||||
-rw-r--r-- | llvm/lib/Target/BPF/BPF.td | 7 | ||||
-rw-r--r-- | llvm/lib/Target/PowerPC/PPC.td | 1 |
4 files changed, 17 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64.td b/llvm/lib/Target/AArch64/AArch64.td index ad6a79ed718..af30ff96f18 100644 --- a/llvm/lib/Target/AArch64/AArch64.td +++ b/llvm/lib/Target/AArch64/AArch64.td @@ -125,11 +125,13 @@ def : ProcessorModel<"cyclone", CycloneModel, [ProcCyclone]>; def GenericAsmParserVariant : AsmParserVariant { int Variant = 0; string Name = "generic"; + string BreakCharacters = "."; } def AppleAsmParserVariant : AsmParserVariant { int Variant = 1; string Name = "apple-neon"; + string BreakCharacters = "."; } //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/ARM/ARM.td b/llvm/lib/Target/ARM/ARM.td index e7423c3dcf8..855b41c03c9 100644 --- a/llvm/lib/Target/ARM/ARM.td +++ b/llvm/lib/Target/ARM/ARM.td @@ -511,8 +511,15 @@ def ARMAsmWriter : AsmWriter { bit isMCAsmWriter = 1; } +def ARMAsmParserVariant : AsmParserVariant { + int Variant = 0; + string Name = "ARM"; + string BreakCharacters = "."; +} + def ARM : Target { // Pull in Instruction Info: let InstructionSet = ARMInstrInfo; let AssemblyWriters = [ARMAsmWriter]; + let AssemblyParserVariants = [ARMAsmParserVariant]; } diff --git a/llvm/lib/Target/BPF/BPF.td b/llvm/lib/Target/BPF/BPF.td index a4ce90af043..8493b0fd1e4 100644 --- a/llvm/lib/Target/BPF/BPF.td +++ b/llvm/lib/Target/BPF/BPF.td @@ -25,7 +25,14 @@ def BPFInstPrinter : AsmWriter { bit isMCAsmWriter = 1; } +def BPFAsmParserVariant : AsmParserVariant { + int Variant = 0; + string Name = "BPF"; + string BreakCharacters = "."; +} + def BPF : Target { let InstructionSet = BPFInstrInfo; let AssemblyWriters = [BPFInstPrinter]; + let AssemblyParserVariants = [BPFAsmParserVariant]; } diff --git a/llvm/lib/Target/PowerPC/PPC.td b/llvm/lib/Target/PowerPC/PPC.td index 641b2377de4..f50100e7a8a 100644 --- a/llvm/lib/Target/PowerPC/PPC.td +++ b/llvm/lib/Target/PowerPC/PPC.td @@ -403,6 +403,7 @@ def PPCAsmParserVariant : AsmParserVariant { // InstAlias definitions use immediate literals. Set RegisterPrefix // so that those are not misinterpreted as registers. string RegisterPrefix = "%"; + string BreakCharacters = "."; } def PPC : Target { |