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authorAlkis Evlogimenos <alkis@evlogimenos.com>2004-09-21 21:22:11 +0000
committerAlkis Evlogimenos <alkis@evlogimenos.com>2004-09-21 21:22:11 +0000
commit89dd63733a59a20e8246b413f79d07f11a1fb3e7 (patch)
tree07eb5c10f98ac9c7e1b48d3d47bb57533903c61d /llvm/lib/Target
parent6b17bf7193f8f90f9b8bb9b12bdedb7672287038 (diff)
downloadbcm5719-llvm-89dd63733a59a20e8246b413f79d07f11a1fb3e7.tar.gz
bcm5719-llvm-89dd63733a59a20e8246b413f79d07f11a1fb3e7.zip
The real x87 floating point registers should not be allocatable. They
are only used by the stackifier when transforming FPn register allocations to the real stack file x87 registers. llvm-svn: 16472
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/X86/X86RegisterInfo.td12
1 files changed, 10 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86RegisterInfo.td b/llvm/lib/Target/X86/X86RegisterInfo.td
index 4262a9ffd70..628a239d014 100644
--- a/llvm/lib/Target/X86/X86RegisterInfo.td
+++ b/llvm/lib/Target/X86/X86RegisterInfo.td
@@ -86,5 +86,13 @@ def R32 : RegisterClass<i32, 32, [EAX, ECX, EDX, ESI, EDI, EBX, EBP, ESP]> {
def RFP : RegisterClass<f80, 32, [FP0, FP1, FP2, FP3, FP4, FP5, FP6]>;
-// Floating point stack registers.
-def RST : RegisterClass<f80, 32, [ST0, ST1, ST2, ST3, ST4, ST5, ST6, ST7]>;
+// Floating point stack registers (these are not allocatable by the
+// register allocator - the floating point stackifier is responsible
+// for transforming FPn allocations to STn registers)
+def RST : RegisterClass<f80, 32, [ST0, ST1, ST2, ST3, ST4, ST5, ST6, ST7]> {
+ let Methods = [{
+ iterator allocation_order_end(MachineFunction &MF) const {
+ return begin();
+ }
+ }];
+}
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