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author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-01-20 17:16:01 +0000 |
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committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-01-20 17:16:01 +0000 |
commit | 89540d9665c224865b4a282ed47d7f1a13ba24c1 (patch) | |
tree | 591b12766b3c0070a2de01d39e469ca6c8028702 /llvm/lib/Target | |
parent | 9cee52732f394857382c3d64156e8a9c0dbcec27 (diff) | |
download | bcm5719-llvm-89540d9665c224865b4a282ed47d7f1a13ba24c1.tar.gz bcm5719-llvm-89540d9665c224865b4a282ed47d7f1a13ba24c1.zip |
[X86][SSE] Check for out of bounds PEXTR/PINSR indices during faux shuffle combining.
llvm-svn: 323045
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index f4049bf9de4..0a2db3450e5 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -6014,8 +6014,11 @@ static bool getFauxShuffleMask(SDValue N, SmallVectorImpl<int> &Mask, case X86ISD::PINSRW: { SDValue InVec = N.getOperand(0); SDValue InScl = N.getOperand(1); + SDValue InIndex = N.getOperand(2); + if (!isa<ConstantSDNode>(InIndex) || + cast<ConstantSDNode>(InIndex)->getAPIntValue().uge(NumElts)) + return false; uint64_t InIdx = N.getConstantOperandVal(2); - assert(InIdx < NumElts && "Illegal insertion index"); // Attempt to recognise a PINSR*(VEC, 0, Idx) shuffle pattern. if (X86::isZeroNode(InScl)) { @@ -6033,8 +6036,12 @@ static bool getFauxShuffleMask(SDValue N, SmallVectorImpl<int> &Mask, return false; SDValue ExVec = InScl.getOperand(0); + SDValue ExIndex = InScl.getOperand(1); + if (!isa<ConstantSDNode>(ExIndex) || + cast<ConstantSDNode>(ExIndex)->getAPIntValue().uge(NumElts)) + return false; uint64_t ExIdx = InScl.getConstantOperandVal(1); - assert(ExIdx < NumElts && "Illegal extraction index"); + Ops.push_back(InVec); Ops.push_back(ExVec); for (unsigned i = 0; i != NumElts; ++i) |