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| author | Jim Grosbach <grosbach@apple.com> | 2010-11-09 18:43:54 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2010-11-09 18:43:54 +0000 |
| commit | 7e51095c23cd2b967f483d1b57fe1ab68186ed8b (patch) | |
| tree | f146503115e78d1585f9758267cbd4ae39e71415 /llvm/lib/Target | |
| parent | c0c67f275d9cc6f0bb34092da8a20448740c2dba (diff) | |
| download | bcm5719-llvm-7e51095c23cd2b967f483d1b57fe1ab68186ed8b.tar.gz bcm5719-llvm-7e51095c23cd2b967f483d1b57fe1ab68186ed8b.zip | |
Add encoding of Rt to ARM LDR/STR w/ reg+reg offset encoding.
llvm-svn: 118600
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrInfo.td | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td index 69f8a6459ef..64a3dc73cee 100644 --- a/llvm/lib/Target/ARM/ARMInstrInfo.td +++ b/llvm/lib/Target/ARM/ARMInstrInfo.td @@ -851,6 +851,7 @@ multiclass AI_ldr1<bit opc22, string opc, InstrItinClass iii, bits<17> shift; let Inst{23} = shift{12}; // U (add = ('U' == 1)) let Inst{19-16} = shift{16-13}; // Rn + let Inst{15-12} = Rt; let Inst{11-0} = shift{11-0}; } } @@ -879,6 +880,7 @@ multiclass AI_str1<bit opc22, string opc, InstrItinClass iii, bits<17> shift; let Inst{23} = shift{12}; // U (add = ('U' == 1)) let Inst{19-16} = shift{16-13}; // Rn + let Inst{15-12} = Rt; let Inst{11-0} = shift{11-0}; } } |
