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authorOwen Anderson <resistor@mac.com>2011-08-09 21:07:45 +0000
committerOwen Anderson <resistor@mac.com>2011-08-09 21:07:45 +0000
commit7a2401dbf0a860aacd143c57c704d01abbcb2705 (patch)
tree6e1005b1381d6084fcf41dccefae74fb424e130b /llvm/lib/Target
parent84cd7927b99223de44ef2992aa32a2d08b4c735c (diff)
downloadbcm5719-llvm-7a2401dbf0a860aacd143c57c704d01abbcb2705.tar.gz
bcm5719-llvm-7a2401dbf0a860aacd143c57c704d01abbcb2705.zip
Tighten Thumb1 branch predicate decoding.
llvm-svn: 137146
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp3
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index 8ae8ce83424..42cd7ba9a6f 100644
--- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -592,6 +592,9 @@ static bool DecodeQPRRegisterClass(llvm::MCInst &Inst, unsigned RegNo,
static bool DecodePredicateOperand(llvm::MCInst &Inst, unsigned Val,
uint64_t Address, const void *Decoder) {
if (Val == 0xF) return false;
+ // AL predicate is not allowed on Thumb1 branches.
+ if (Inst.getOpcode() == ARM::tBcc && Val == 0xE)
+ return false;
Inst.addOperand(MCOperand::CreateImm(Val));
if (Val == ARMCC::AL) {
Inst.addOperand(MCOperand::CreateReg(0));
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