fix trivial typos in comments; NFC

llvm-svn: 307094

2 files changed, 2 insertions, 2 deletions

diff --git a/llvm/lib/Target/ARM/ARMCallLowering.cpp b/llvm/lib/Target/ARM/ARMCallLowering.cpp
index e498f70b820..051827a6a6a 100644
--- a/llvm/lib/Target/ARM/ARMCallLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMCallLowering.cpp
@@ -321,7 +321,7 @@ struct IncomingValueHandler : public CallLowering::ValueHandler {
     assert(VA.getValVT().getSizeInBits() <= 64 && "Unsupported value size");
     assert(VA.getLocVT().getSizeInBits() <= 64 && "Unsupported location size");
 
-    // The necesary extensions are handled on the other side of the ABI
+    // The necessary extensions are handled on the other side of the ABI
     // boundary.
     markPhysRegUsed(PhysReg);
     MIRBuilder.buildCopy(ValVReg, PhysReg);
diff --git a/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp b/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
index f26b9a7cb8d..54579d0267f 100644
--- a/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
@@ -2456,7 +2456,7 @@ SDValue NVPTXTargetLowering::LowerFormalArguments(
             // v2f16 was loaded as an i32. Now we must bitcast it back.

             else if (EltVT == MVT::v2f16)

               Elt = DAG.getNode(ISD::BITCAST, dl, MVT::v2f16, Elt);

-            // Extend the element if necesary (e.g. an i8 is loaded

+            // Extend the element if necessary (e.g. an i8 is loaded

             // into an i16 register)

             if (Ins[InsIdx].VT.isInteger() &&

                 Ins[InsIdx].VT.getSizeInBits() > LoadVT.getSizeInBits()) {