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| author | Zoran Jovanovic <zoran.jovanovic@imgtec.com> | 2014-08-14 12:09:10 +0000 |
|---|---|---|
| committer | Zoran Jovanovic <zoran.jovanovic@imgtec.com> | 2014-08-14 12:09:10 +0000 |
| commit | 73ff9487467bf38d3fe508aa7bf7b7e30c6c7937 (patch) | |
| tree | c02af3217132d33e302b2e97dd60defab984273a /llvm/lib/Target | |
| parent | 992ca1d828aaa4e4241feb2830bf3b13b166a3d6 (diff) | |
| download | bcm5719-llvm-73ff9487467bf38d3fe508aa7bf7b7e30c6c7937.tar.gz bcm5719-llvm-73ff9487467bf38d3fe508aa7bf7b7e30c6c7937.zip | |
[mips][microMIPS] MicroMIPS Compact Branch Instructions BEQZC and BNEZC
Differential Revision: http://reviews.llvm.org/D3545
llvm-svn: 215636
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/Mips/MicroMipsInstrFormats.td | 12 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/MicroMipsInstrInfo.td | 16 |
2 files changed, 28 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/MicroMipsInstrFormats.td b/llvm/lib/Target/Mips/MicroMipsInstrFormats.td index 15b951d98c5..90fbce72478 100644 --- a/llvm/lib/Target/Mips/MicroMipsInstrFormats.td +++ b/llvm/lib/Target/Mips/MicroMipsInstrFormats.td @@ -621,3 +621,15 @@ class MADDS_FM_MM<bits<6> funct>: MMArch { let Inst{10-6} = fr; let Inst{5-0} = funct; } + +class COMPACT_BRANCH_FM_MM<bits<5> funct> { + bits<5> rs; + bits<16> offset; + + bits<32> Inst; + + let Inst{31-26} = 0x10; + let Inst{25-21} = funct; + let Inst{20-16} = rs; + let Inst{15-0} = offset; +} diff --git a/llvm/lib/Target/Mips/MicroMipsInstrInfo.td b/llvm/lib/Target/Mips/MicroMipsInstrInfo.td index 87a3a3e29ca..f48083bbe6e 100644 --- a/llvm/lib/Target/Mips/MicroMipsInstrInfo.td +++ b/llvm/lib/Target/Mips/MicroMipsInstrInfo.td @@ -26,6 +26,16 @@ def brtarget_mm : Operand<OtherVT> { let DecoderMethod = "DecodeBranchTargetMM"; } +class CompactBranchMM<string opstr, DAGOperand opnd, PatFrag cond_op, + RegisterOperand RO> : + InstSE<(outs), (ins RO:$rs, opnd:$offset), + !strconcat(opstr, "\t$rs, $offset"), [], IIBranch, FrmI> { + let isBranch = 1; + let isTerminator = 1; + let hasDelaySlot = 0; + let Defs = [AT]; +} + let canFoldAsLoad = 1 in class LoadLeftRightMM<string opstr, SDNode OpNode, RegisterOperand RO, Operand MemOpnd> : @@ -104,6 +114,12 @@ class WaitMM<string opstr> : NoItinerary, FrmOther, opstr>; let DecoderNamespace = "MicroMips", Predicates = [InMicroMips] in { + /// Compact Branch Instructions + def BEQZC_MM : CompactBranchMM<"beqzc", brtarget_mm, seteq, GPR32Opnd>, + COMPACT_BRANCH_FM_MM<0x7>; + def BNEZC_MM : CompactBranchMM<"bnezc", brtarget_mm, setne, GPR32Opnd>, + COMPACT_BRANCH_FM_MM<0x5>; + /// Arithmetic Instructions (ALU Immediate) def ADDiu_MM : MMRel, ArithLogicI<"addiu", simm16, GPR32Opnd>, ADDI_FM_MM<0xc>; |

