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author | Colin LeMahieu <colinl@codeaurora.org> | 2016-02-29 18:39:51 +0000 |
---|---|---|
committer | Colin LeMahieu <colinl@codeaurora.org> | 2016-02-29 18:39:51 +0000 |
commit | 73cd686ce144730f876870658d1ed75d3ffcc7ae (patch) | |
tree | 3b0007976ee1f55ef1e025058a3018a5ed52b96d /llvm/lib/Target | |
parent | 2ce5cf03931d143c3831e7ea5d8f1e20b6c7a81f (diff) | |
download | bcm5719-llvm-73cd686ce144730f876870658d1ed75d3ffcc7ae.tar.gz bcm5719-llvm-73cd686ce144730f876870658d1ed75d3ffcc7ae.zip |
[Hexagon] Using MustExtend flag on expression instead of passing around bools.
llvm-svn: 262238
Diffstat (limited to 'llvm/lib/Target')
4 files changed, 64 insertions, 55 deletions
diff --git a/llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp b/llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp index 03cb9ab46ce..44d1dd64e12 100644 --- a/llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp +++ b/llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp @@ -108,7 +108,7 @@ class HexagonAsmParser : public MCTargetAsmParser { void canonicalizeImmediates(MCInst &MCI); bool matchOneInstruction(MCInst &MCB, SMLoc IDLoc, OperandVector &InstOperands, uint64_t &ErrorInfo, - bool MatchingInlineAsm, bool &MustExtend); + bool MatchingInlineAsm); bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, OperandVector &Operands, MCStreamer &Out, @@ -117,7 +117,7 @@ class HexagonAsmParser : public MCTargetAsmParser { unsigned validateTargetOperandClass(MCParsedAsmOperand &Op, unsigned Kind) override; void OutOfRange(SMLoc IDLoc, long long Val, long long Max); int processInstruction(MCInst &Inst, OperandVector const &Operands, - SMLoc IDLoc, bool &MustExtend); + SMLoc IDLoc); // Check if we have an assembler and, if so, set the ELF e_header flags. void chksetELFHeaderEFlags(unsigned flags) { @@ -186,7 +186,6 @@ struct HexagonOperand : public MCParsedAsmOperand { struct ImmTy { const MCExpr *Val; - bool MustExtend; }; struct InstTy { @@ -244,7 +243,7 @@ public: bool isRelocatable, bool Extendable) const { if (Kind == Immediate) { const MCExpr *myMCExpr = &HexagonMCInstrInfo::getExpr(*getImm()); - if (Imm.MustExtend && !Extendable) + if (HexagonMCInstrInfo::mustExtend(*Imm.Val) && !Extendable) return false; int64_t Res; if (myMCExpr->evaluateAsAbsolute(Res)) { @@ -348,7 +347,7 @@ public: bool isu6_1Ext() const { return CheckImmRange(6 + 26, 1, false, true, true); } bool isu6_2Ext() const { return CheckImmRange(6 + 26, 2, false, true, true); } bool isu6_3Ext() const { return CheckImmRange(6 + 26, 3, false, true, true); } - bool isu32MustExt() const { return isImm() && Imm.MustExtend; } + bool isu32MustExt() const { return isImm(); } void addRegOperands(MCInst &Inst, unsigned N) const { assert(N == 1 && "Invalid number of operands!"); @@ -598,7 +597,6 @@ public: SMLoc E) { HexagonOperand *Op = new HexagonOperand(Immediate); Op->Imm.Val = Val; - Op->Imm.MustExtend = false; Op->StartLoc = S; Op->EndLoc = E; return std::unique_ptr<HexagonOperand>(Op); @@ -782,16 +780,14 @@ void HexagonAsmParser::canonicalizeImmediates(MCInst &MCI) { bool HexagonAsmParser::matchOneInstruction(MCInst &MCI, SMLoc IDLoc, OperandVector &InstOperands, uint64_t &ErrorInfo, - bool MatchingInlineAsm, - bool &MustExtend) { + bool MatchingInlineAsm) { // Perform matching with tablegen asmmatcher generated function int result = MatchInstructionImpl(InstOperands, MCI, ErrorInfo, MatchingInlineAsm); if (result == Match_Success) { MCI.setLoc(IDLoc); - MustExtend = mustExtend(InstOperands); canonicalizeImmediates(MCI); - result = processInstruction(MCI, InstOperands, IDLoc, MustExtend); + result = processInstruction(MCI, InstOperands, IDLoc); DEBUG(dbgs() << "Insn:"); DEBUG(MCI.dump_pretty(dbgs())); @@ -833,7 +829,8 @@ bool HexagonAsmParser::mustExtend(OperandVector &Operands) { unsigned Count = 0; for (std::unique_ptr<MCParsedAsmOperand> &i : Operands) if (i->isImm()) - if (static_cast<HexagonOperand *>(i.get())->Imm.MustExtend) + if (HexagonMCInstrInfo::mustExtend( + *static_cast<HexagonOperand *>(i.get())->Imm.Val)) ++Count; // Multiple extenders should have been filtered by iss9Ext et. al. assert(Count < 2 && "Multiple extenders"); @@ -871,13 +868,11 @@ bool HexagonAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, return finishBundle(IDLoc, Out); } MCInst *SubInst = new (getParser().getContext()) MCInst; - bool MustExtend = false; if (matchOneInstruction(*SubInst, IDLoc, Operands, ErrorInfo, - MatchingInlineAsm, MustExtend)) + MatchingInlineAsm)) return true; HexagonMCInstrInfo::extendIfNeeded( - getParser().getContext(), MCII, MCB, *SubInst, - HexagonMCInstrInfo::isExtended(MCII, *SubInst) || MustExtend); + getParser().getContext(), MCII, MCB, *SubInst); MCB.addOperand(MCOperand::createInst(SubInst)); if (!InBrackets) return finishBundle(IDLoc, Out); @@ -1446,9 +1441,9 @@ bool HexagonAsmParser::parseInstruction(OperandVector &Operands) { } Expr = HexagonMCExpr::create(Expr, Context); HexagonMCInstrInfo::setMustNotExtend(*Expr, MustNotExtend); + HexagonMCInstrInfo::setMustExtend(*Expr, MustExtend); std::unique_ptr<HexagonOperand> Operand = HexagonOperand::CreateImm(Expr, ExprLoc, ExprLoc); - Operand->Imm.MustExtend = MustExtend; Operands.push_back(std::move(Operand)); continue; } @@ -1535,7 +1530,7 @@ void HexagonAsmParser::OutOfRange(SMLoc IDLoc, long long Val, long long Max) { int HexagonAsmParser::processInstruction(MCInst &Inst, OperandVector const &Operands, - SMLoc IDLoc, bool &MustExtend) { + SMLoc IDLoc) { MCContext &Context = getParser().getContext(); const MCRegisterInfo *RI = getContext().getRegisterInfo(); std::string r = "r"; @@ -1789,9 +1784,11 @@ int HexagonAsmParser::processInstruction(MCInst &Inst, OutOfRange(IDLoc, s8, -128); MCOperand imm(MCOperand::createExpr(HexagonMCExpr::create( MCConstantExpr::create(s8, Context), Context))); // upper 32 - MCOperand imm2(MCOperand::createExpr(HexagonMCExpr::create( - MCConstantExpr::create(u64 & 0xFFFFFFFF, Context), - Context))); // lower 32 + auto Expr = HexagonMCExpr::create( + MCConstantExpr::create(u64 & 0xFFFFFFFF, Context), + Context); + HexagonMCInstrInfo::setMustExtend(*Expr, HexagonMCInstrInfo::mustExtend(*MO.getExpr())); + MCOperand imm2(MCOperand::createExpr(Expr)); // lower 32 Inst = makeCombineInst(Hexagon::A4_combineii, Rdd, imm, imm2); } else { MCOperand imm(MCOperand::createExpr(HexagonMCExpr::create( @@ -1903,10 +1900,11 @@ int HexagonAsmParser::processInstruction(MCInst &Inst, MCOperand &Rs = Inst.getOperand(1); MCOperand &Imm = Inst.getOperand(2); int64_t Value; - bool Absolute = Imm.getExpr()->evaluateAsAbsolute(Value); + MCExpr const &Expr = *Imm.getExpr(); + bool Absolute = Expr.evaluateAsAbsolute(Value); assert(Absolute); (void)Absolute; - if (!MustExtend) { + if (!HexagonMCInstrInfo::mustExtend(Expr)) { if (Value < 0 && Value > -256) { Imm.setExpr(HexagonMCExpr::create( MCConstantExpr::create(Value * -1, Context), Context)); diff --git a/llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp b/llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp index 401a8b75bce..a5dc002642c 100644 --- a/llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp +++ b/llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp @@ -32,7 +32,7 @@ namespace llvm { } static MCOperand GetSymbolRef(const MachineOperand &MO, const MCSymbol *Symbol, - HexagonAsmPrinter &Printer) { + HexagonAsmPrinter &Printer, bool MustExtend) { MCContext &MC = Printer.OutContext; const MCExpr *ME; @@ -81,7 +81,9 @@ static MCOperand GetSymbolRef(const MachineOperand &MO, const MCSymbol *Symbol, ME = MCBinaryExpr::createAdd(ME, MCConstantExpr::create(MO.getOffset(), MC), MC); - return MCOperand::createExpr(HexagonMCExpr::create(ME, MC)); + ME = HexagonMCExpr::create(ME, MC); + HexagonMCInstrInfo::setMustExtend(*ME, MustExtend); + return MCOperand::createExpr(ME); } // Create an MCInst from a MachineInstr @@ -99,13 +101,11 @@ void llvm::HexagonLowerToMC(const MCInstrInfo &MCII, const MachineInstr *MI, MCI->setOpcode(MI->getOpcode()); assert(MCI->getOpcode() == static_cast<unsigned>(MI->getOpcode()) && "MCI opcode should have been set on construction"); - bool MustExtend = false; for (unsigned i = 0, e = MI->getNumOperands(); i < e; i++) { const MachineOperand &MO = MI->getOperand(i); MCOperand MCO; - if (MO.getTargetFlags() & HexagonII::HMOTF_ConstExtended) - MustExtend = true; + bool MustExtend = MO.getTargetFlags() & HexagonII::HMOTF_ConstExtended; switch (MO.getType()) { default: @@ -120,42 +120,51 @@ void llvm::HexagonLowerToMC(const MCInstrInfo &MCII, const MachineInstr *MI, APFloat Val = MO.getFPImm()->getValueAPF(); // FP immediates are used only when setting GPRs, so they may be dealt // with like regular immediates from this point on. - MCO = MCOperand::createExpr( - HexagonMCExpr::create(MCConstantExpr::create(*Val.bitcastToAPInt().getRawData(), - AP.OutContext), AP.OutContext)); + auto Expr = HexagonMCExpr::create( + MCConstantExpr::create(*Val.bitcastToAPInt().getRawData(), + AP.OutContext), + AP.OutContext); + HexagonMCInstrInfo::setMustExtend(*Expr, MustExtend); + MCO = MCOperand::createExpr(Expr); break; } - case MachineOperand::MO_Immediate: - MCO = MCOperand::createExpr( - HexagonMCExpr::create(MCConstantExpr::create(MO.getImm(), AP.OutContext), AP.OutContext)); + case MachineOperand::MO_Immediate: { + auto Expr = HexagonMCExpr::create( + MCConstantExpr::create(MO.getImm(), AP.OutContext), AP.OutContext); + HexagonMCInstrInfo::setMustExtend(*Expr, MustExtend); + MCO = MCOperand::createExpr(Expr); break; - case MachineOperand::MO_MachineBasicBlock: - MCO = MCOperand::createExpr - (HexagonMCExpr::create(MCSymbolRefExpr::create(MO.getMBB()->getSymbol(), - AP.OutContext), AP.OutContext)); + } + case MachineOperand::MO_MachineBasicBlock: { + MCExpr const *Expr = MCSymbolRefExpr::create(MO.getMBB()->getSymbol(), + AP.OutContext); + Expr = HexagonMCExpr::create(Expr, AP.OutContext); + HexagonMCInstrInfo::setMustExtend(*Expr, MustExtend); + MCO = MCOperand::createExpr(Expr); break; + } case MachineOperand::MO_GlobalAddress: - MCO = GetSymbolRef(MO, AP.getSymbol(MO.getGlobal()), AP); + MCO = GetSymbolRef(MO, AP.getSymbol(MO.getGlobal()), AP, MustExtend); break; case MachineOperand::MO_ExternalSymbol: MCO = GetSymbolRef(MO, AP.GetExternalSymbolSymbol(MO.getSymbolName()), - AP); + AP, MustExtend); break; case MachineOperand::MO_JumpTableIndex: - MCO = GetSymbolRef(MO, AP.GetJTISymbol(MO.getIndex()), AP); + MCO = GetSymbolRef(MO, AP.GetJTISymbol(MO.getIndex()), AP, MustExtend); break; case MachineOperand::MO_ConstantPoolIndex: - MCO = GetSymbolRef(MO, AP.GetCPISymbol(MO.getIndex()), AP); + MCO = GetSymbolRef(MO, AP.GetCPISymbol(MO.getIndex()), AP, MustExtend); break; case MachineOperand::MO_BlockAddress: - MCO = GetSymbolRef(MO, AP.GetBlockAddressSymbol(MO.getBlockAddress()),AP); + MCO = GetSymbolRef(MO, AP.GetBlockAddressSymbol(MO.getBlockAddress()), AP, + MustExtend); break; } MCI->addOperand(MCO); } AP.HexagonProcessInstruction(*MCI, *MI); - HexagonMCInstrInfo::extendIfNeeded(AP.OutContext, MCII, MCB, *MCI, - MustExtend); + HexagonMCInstrInfo::extendIfNeeded(AP.OutContext, MCII, MCB, *MCI); MCB.addOperand(MCOperand::createInst(MCI)); } diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp index 8444b430011..220db3a9a82 100644 --- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp +++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp @@ -160,8 +160,8 @@ MCInst const *HexagonMCInstrInfo::extenderForIndex(MCInst const &MCB, void HexagonMCInstrInfo::extendIfNeeded(MCContext &Context, MCInstrInfo const &MCII, MCInst &MCB, - MCInst const &MCI, bool MustExtend) { - if (isConstExtended(MCII, MCI) || MustExtend) + MCInst const &MCI) { + if (isConstExtended(MCII, MCI)) addConstExtender(Context, MCII, MCB, MCI); } @@ -408,6 +408,12 @@ bool HexagonMCInstrInfo::isConstExtended(MCInstrInfo const &MCII, MCInst const &MCI) { if (HexagonMCInstrInfo::isExtended(MCII, MCI)) return true; + if (!HexagonMCInstrInfo::isExtendable(MCII, MCI)) + return false; + MCOperand const &MO = HexagonMCInstrInfo::getExtendableOperand(MCII, MCI); + if (isa<HexagonMCExpr>(MO.getExpr()) && + HexagonMCInstrInfo::mustExtend(*MO.getExpr())) + return true; // Branch insns are handled as necessary by relaxation. if ((HexagonMCInstrInfo::getType(MCII, MCI) == HexagonII::TypeJ) || (HexagonMCInstrInfo::getType(MCII, MCI) == HexagonII::TypeCOMPOUND && @@ -419,10 +425,6 @@ bool HexagonMCInstrInfo::isConstExtended(MCInstrInfo const &MCII, else if ((HexagonMCInstrInfo::getType(MCII, MCI) == HexagonII::TypeCR) && (MCI.getOpcode() != Hexagon::C4_addipc)) return false; - else if (!HexagonMCInstrInfo::isExtendable(MCII, MCI)) - return false; - - MCOperand const &MO = HexagonMCInstrInfo::getExtendableOperand(MCII, MCI); // We could be using an instruction with an extendable immediate and shoehorn // a global address into it. If it is a global address it will be constant @@ -584,9 +586,9 @@ int64_t HexagonMCInstrInfo::minConstant(MCInst const &MCI, size_t Index) { return Sentinal; return Value; } - -void HexagonMCInstrInfo::setMustExtend(MCExpr &Expr, bool Val) { - HexagonMCExpr &HExpr = cast<HexagonMCExpr>(Expr); + +void HexagonMCInstrInfo::setMustExtend(MCExpr const &Expr, bool Val) { + HexagonMCExpr &HExpr = const_cast<HexagonMCExpr &>(cast<HexagonMCExpr>(Expr)); HExpr.setMustExtend(Val); } diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.h b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.h index c9162a6aa6a..2a1d11c3c74 100644 --- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.h +++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.h @@ -75,7 +75,7 @@ MCInst createBundle(); // Return the extender for instruction at Index or nullptr if none MCInst const *extenderForIndex(MCInst const &MCB, size_t Index); void extendIfNeeded(MCContext &Context, MCInstrInfo const &MCII, MCInst &MCB, - MCInst const &MCI, bool MustExtend); + MCInst const &MCI); // Create a duplex instruction given the two subinsts MCInst *deriveDuplex(MCContext &Context, unsigned iClass, MCInst const &inst0, @@ -279,7 +279,7 @@ bool s23_2_reloc(MCExpr const &Expr); void setInnerLoop(MCInst &MCI); void setMemReorderDisabled(MCInst &MCI); void setMemStoreReorderEnabled(MCInst &MCI); -void setMustExtend(MCExpr &Expr, bool Val = true); +void setMustExtend(MCExpr const &Expr, bool Val = true); void setMustNotExtend(MCExpr const &Expr, bool Val = true); void setS23_2_reloc(MCExpr const &Expr, bool Val = true); |