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| author | Shiva Chen <shiva0217@gmail.com> | 2019-08-22 04:59:43 +0000 | 
|---|---|---|
| committer | Shiva Chen <shiva0217@gmail.com> | 2019-08-22 04:59:43 +0000 | 
| commit | 72a41e7b0d0483afad6af64a99f3422e498f8809 (patch) | |
| tree | 04ef4f2452ee7e72ff44ab6edd5d1cde7b366f3f /llvm/lib/Target | |
| parent | 83ee8d4463d1bb1d2248f5cc7f5577672d3ddf94 (diff) | |
| download | bcm5719-llvm-72a41e7b0d0483afad6af64a99f3422e498f8809.tar.gz bcm5719-llvm-72a41e7b0d0483afad6af64a99f3422e498f8809.zip | |
[TargetLowering] Remove optional arguments passing to makeLibCall
The patch introduces MakeLibCallOptions struct as suggested by @efriedma on D65497.
The struct contain argument flags which will pass to makeLibCall function.
The patch should not has any functionality changes.
Differential Revision: https://reviews.llvm.org/D65795
llvm-svn: 369622
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 9 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.cpp | 14 | ||||
| -rw-r--r-- | llvm/lib/Target/Sparc/SparcISelLowering.cpp | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp | 3 | 
4 files changed, 20 insertions, 10 deletions
| diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp index f2fa2e0d0ec..84cd8398588 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -2193,7 +2193,8 @@ getAArch64XALUOOp(AArch64CC::CondCode &CC, SDValue Op, SelectionDAG &DAG) {  SDValue AArch64TargetLowering::LowerF128Call(SDValue Op, SelectionDAG &DAG,                                               RTLIB::Libcall Call) const {    SmallVector<SDValue, 2> Ops(Op->op_begin(), Op->op_end()); -  return makeLibCall(DAG, Call, MVT::f128, Ops, false, SDLoc(Op)).first; +  MakeLibCallOptions CallOptions; +  return makeLibCall(DAG, Call, MVT::f128, Ops, CallOptions, SDLoc(Op)).first;  }  // Returns true if the given Op is the overflow flag result of an overflow @@ -2402,7 +2403,8 @@ SDValue AArch64TargetLowering::LowerFP_ROUND(SDValue Op,    // precise. That doesn't take part in the LibCall so we can't directly use    // LowerF128Call.    SDValue SrcVal = Op.getOperand(0); -  return makeLibCall(DAG, LC, Op.getValueType(), SrcVal, /*isSigned*/ false, +  MakeLibCallOptions CallOptions; +  return makeLibCall(DAG, LC, Op.getValueType(), SrcVal, CallOptions,                       SDLoc(Op)).first;  } @@ -2472,7 +2474,8 @@ SDValue AArch64TargetLowering::LowerFP_TO_INT(SDValue Op,      LC = RTLIB::getFPTOUINT(Op.getOperand(0).getValueType(), Op.getValueType());    SmallVector<SDValue, 2> Ops(Op->op_begin(), Op->op_end()); -  return makeLibCall(DAG, LC, Op.getValueType(), Ops, false, SDLoc(Op)).first; +  MakeLibCallOptions CallOptions; +  return makeLibCall(DAG, LC, Op.getValueType(), Ops, CallOptions, SDLoc(Op)).first;  }  static SDValue LowerVectorINT_TO_FP(SDValue Op, SelectionDAG &DAG) { diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index 833040f8c64..04ac7777f5e 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -5215,8 +5215,9 @@ SDValue ARMTargetLowering::LowerFP_TO_INT(SDValue Op, SelectionDAG &DAG) const {      else        LC = RTLIB::getFPTOUINT(Op.getOperand(0).getValueType(),                                Op.getValueType()); +    MakeLibCallOptions CallOptions;      return makeLibCall(DAG, LC, Op.getValueType(), Op.getOperand(0), -                       /*isSigned*/ false, SDLoc(Op)).first; +                       CallOptions, SDLoc(Op)).first;    }    return Op; @@ -5279,8 +5280,9 @@ SDValue ARMTargetLowering::LowerINT_TO_FP(SDValue Op, SelectionDAG &DAG) const {      else        LC = RTLIB::getUINTTOFP(Op.getOperand(0).getValueType(),                                Op.getValueType()); +    MakeLibCallOptions CallOptions;      return makeLibCall(DAG, LC, Op.getValueType(), Op.getOperand(0), -                       /*isSigned*/ false, SDLoc(Op)).first; +                       CallOptions, SDLoc(Op)).first;    }    return Op; @@ -15605,6 +15607,7 @@ SDValue ARMTargetLowering::LowerFP_EXTEND(SDValue Op, SelectionDAG &DAG) const {    // without FP16. So we must do a function call.    SDLoc Loc(Op);    RTLIB::Libcall LC; +  MakeLibCallOptions CallOptions;    if (SrcSz == 16) {      // Instruction from 16 -> 32      if (Subtarget->hasFP16()) @@ -15615,7 +15618,7 @@ SDValue ARMTargetLowering::LowerFP_EXTEND(SDValue Op, SelectionDAG &DAG) const {        assert(LC != RTLIB::UNKNOWN_LIBCALL &&               "Unexpected type for custom-lowering FP_EXTEND");        SrcVal = -        makeLibCall(DAG, LC, MVT::f32, SrcVal, /*isSigned*/ false, Loc).first; +        makeLibCall(DAG, LC, MVT::f32, SrcVal, CallOptions, Loc).first;      }    } @@ -15628,7 +15631,7 @@ SDValue ARMTargetLowering::LowerFP_EXTEND(SDValue Op, SelectionDAG &DAG) const {    LC = RTLIB::getFPEXT(MVT::f32, MVT::f64);    assert(LC != RTLIB::UNKNOWN_LIBCALL &&           "Unexpected type for custom-lowering FP_EXTEND"); -  return makeLibCall(DAG, LC, MVT::f64, SrcVal, /*isSigned*/ false, Loc).first; +  return makeLibCall(DAG, LC, MVT::f64, SrcVal, CallOptions, Loc).first;  }  SDValue ARMTargetLowering::LowerFP_ROUND(SDValue Op, SelectionDAG &DAG) const { @@ -15654,7 +15657,8 @@ SDValue ARMTargetLowering::LowerFP_ROUND(SDValue Op, SelectionDAG &DAG) const {    RTLIB::Libcall LC = RTLIB::getFPROUND(SrcVT, DstVT);    assert(LC != RTLIB::UNKNOWN_LIBCALL &&           "Unexpected type for custom-lowering FP_ROUND"); -  return makeLibCall(DAG, LC, DstVT, SrcVal, /*isSigned*/ false, Loc).first; +  MakeLibCallOptions CallOptions; +  return makeLibCall(DAG, LC, DstVT, SrcVal, CallOptions, Loc).first;  }  void ARMTargetLowering::lowerABS(SDNode *N, SmallVectorImpl<SDValue> &Results, diff --git a/llvm/lib/Target/Sparc/SparcISelLowering.cpp b/llvm/lib/Target/Sparc/SparcISelLowering.cpp index 4bae160c43e..99e555a0626 100644 --- a/llvm/lib/Target/Sparc/SparcISelLowering.cpp +++ b/llvm/lib/Target/Sparc/SparcISelLowering.cpp @@ -2951,9 +2951,11 @@ static SDValue LowerUMULO_SMULO(SDValue Op, SelectionDAG &DAG,    SDValue HiRHS = DAG.getNode(ISD::SRA, dl, MVT::i64, RHS, ShiftAmt);    SDValue Args[] = { HiLHS, LHS, HiRHS, RHS }; +  TargetLowering::MakeLibCallOptions CallOptions; +  CallOptions.setSExt(isSigned);    SDValue MulResult = TLI.makeLibCall(DAG,                                        RTLIB::MUL_I128, WideVT, -                                      Args, isSigned, dl).first; +                                      Args, CallOptions, dl).first;    SDValue BottomHalf = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, VT,                                     MulResult, DAG.getIntPtrConstant(0, dl));    SDValue TopHalf = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, VT, diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp index 3cbc109020f..4ac9995db01 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp @@ -1056,8 +1056,9 @@ SDValue WebAssemblyTargetLowering::LowerRETURNADDR(SDValue Op,      return SDValue();    unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue(); +  MakeLibCallOptions CallOptions;    return makeLibCall(DAG, RTLIB::RETURN_ADDRESS, Op.getValueType(), -                     {DAG.getConstant(Depth, DL, MVT::i32)}, false, DL) +                     {DAG.getConstant(Depth, DL, MVT::i32)}, CallOptions, DL)        .first;  } | 

