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| author | Sam Elliott <selliott@lowrisc.org> | 2019-10-28 09:52:21 +0000 |
|---|---|---|
| committer | Sam Elliott <selliott@lowrisc.org> | 2019-10-28 09:54:33 +0000 |
| commit | 7214f7a79f4bf791e5c6726757dbcec143f0aa91 (patch) | |
| tree | acfdc8b7f7f79a3276930d1337e8df3789808706 /llvm/lib/Target | |
| parent | da68fd8f81602f388b4a603518fede7fcafd3bc1 (diff) | |
| download | bcm5719-llvm-7214f7a79f4bf791e5c6726757dbcec143f0aa91.tar.gz bcm5719-llvm-7214f7a79f4bf791e5c6726757dbcec143f0aa91.zip | |
[RISCV] Lower llvm.trap and llvm.debugtrap
Summary:
Until this commit, these have lowered to a call to abort().
`llvm.trap()` now lowers to `unimp`, which should trap on all systems.
`llvm.debugtrap()` now lowers to `ebreak`, which is exactly what this
instruction is for.
Reviewers: asb, luismarques
Reviewed By: asb
Subscribers: hiraditya, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, s.egerton, pzheng, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69390
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 3 | ||||
| -rw-r--r-- | llvm/lib/Target/RISCV/RISCVInstrInfo.td | 10 |
2 files changed, 13 insertions, 0 deletions
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp index b67d4a85c32..4058af7328c 100644 --- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp @@ -193,6 +193,9 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM, setOperationAction(ISD::READCYCLECOUNTER, MVT::i64, Subtarget.is64Bit() ? Legal : Custom); + setOperationAction(ISD::TRAP, MVT::Other, Legal); + setOperationAction(ISD::DEBUGTRAP, MVT::Other, Legal); + if (Subtarget.hasStdExtA()) { setMaxAtomicSizeInBitsSupported(Subtarget.getXLen()); setMinCmpXchgSizeInBits(32); diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.td b/llvm/lib/Target/RISCV/RISCVInstrInfo.td index db2ecc49d14..aaddecdc7d2 100644 --- a/llvm/lib/Target/RISCV/RISCVInstrInfo.td +++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.td @@ -1097,6 +1097,16 @@ let Predicates = [IsRV32], usesCustomInserter = 1, hasSideEffects = 0, mayLoad = 0, mayStore = 0, hasNoSchedulingInfo = 1 in def ReadCycleWide : Pseudo<(outs GPR:$lo, GPR:$hi), (ins), [], "", "">; +/// traps + +// We lower `trap` to `unimp`, as this causes a hard exception on nearly all +// systems. +def : Pat<(trap), (UNIMP)>; + +// We lower `debugtrap` to `ebreak`, as this will get the attention of the +// debugger if possible. +def : Pat<(debugtrap), (EBREAK)>; + //===----------------------------------------------------------------------===// // Standard extensions //===----------------------------------------------------------------------===// |

