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authorCraig Topper <craig.topper@intel.com>2018-03-23 06:41:35 +0000
committerCraig Topper <craig.topper@intel.com>2018-03-23 06:41:35 +0000
commit6ef55d1887d05476c9e881256e97e2577bee20bf (patch)
treec126a142fe8e035458b03da12a03b10f8c572da0 /llvm/lib/Target
parentfe9a55a3f1f0622d54af3649f68f40643a36f919 (diff)
downloadbcm5719-llvm-6ef55d1887d05476c9e881256e97e2577bee20bf.tar.gz
bcm5719-llvm-6ef55d1887d05476c9e881256e97e2577bee20bf.zip
[X86] Fix the itinerary for vextractps to match extractps.
llvm-svn: 328289
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/X86/X86InstrSSE.td4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td
index 94d23dce744..3925e8a4d16 100644
--- a/llvm/lib/Target/X86/X86InstrSSE.td
+++ b/llvm/lib/Target/X86/X86InstrSSE.td
@@ -5696,7 +5696,7 @@ defm PEXTRQ : SS41I_extract64<0x16, "pextrq">, REX_W;
/// SS41I_extractf32 - SSE 4.1 extract 32 bits fp value to int reg or memory
/// destination
multiclass SS41I_extractf32<bits<8> opc, string OpcodeStr,
- OpndItins itins = DEFAULT_ITINS> {
+ OpndItins itins = SSE_EXTRACT_ITINS> {
def rr : SS4AIi8<opc, MRMDestReg, (outs GR32orGR64:$dst),
(ins VR128:$src1, u8imm:$src2),
!strconcat(OpcodeStr,
@@ -5716,7 +5716,7 @@ multiclass SS41I_extractf32<bits<8> opc, string OpcodeStr,
let ExeDomain = SSEPackedSingle in {
let Predicates = [UseAVX] in
defm VEXTRACTPS : SS41I_extractf32<0x17, "vextractps">, VEX, VEX_WIG;
- defm EXTRACTPS : SS41I_extractf32<0x17, "extractps", SSE_EXTRACT_ITINS>;
+ defm EXTRACTPS : SS41I_extractf32<0x17, "extractps">;
}
// Also match an EXTRACTPS store when the store is done as f32 instead of i32.
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