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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-07-21 18:34:51 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-07-21 18:34:51 +0000 |
| commit | 6ab9ea961435aa5341460f120b2c40abbf8528f7 (patch) | |
| tree | a92a07159b11186b5e1de11354847b23b3c85a94 /llvm/lib/Target | |
| parent | c85041fe00c799b7e4dc2f8c1cfc9be02faf49a5 (diff) | |
| download | bcm5719-llvm-6ab9ea961435aa5341460f120b2c40abbf8528f7.tar.gz bcm5719-llvm-6ab9ea961435aa5341460f120b2c40abbf8528f7.zip | |
AMDGPU: Don't track lgkmcnt for global_/scratch_ instructions
llvm-svn: 308766
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/FLATInstructions.td | 11 | ||||
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 11 | ||||
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrInfo.h | 4 |
3 files changed, 17 insertions, 9 deletions
diff --git a/llvm/lib/Target/AMDGPU/FLATInstructions.td b/llvm/lib/Target/AMDGPU/FLATInstructions.td index c886e49af28..fcfd629d55e 100644 --- a/llvm/lib/Target/AMDGPU/FLATInstructions.td +++ b/llvm/lib/Target/AMDGPU/FLATInstructions.td @@ -25,11 +25,6 @@ class FLAT_Pseudo<string opName, dag outs, dag ins, let SubtargetPredicate = isCIVI; let FLAT = 1; - // Internally, FLAT instruction are executed as both an LDS and a - // Buffer instruction; so, they increment both VM_CNT and LGKM_CNT - // and are not considered done until both have been decremented. - let VM_CNT = 1; - let LGKM_CNT = 1; let UseNamedOperandTable = 1; let hasSideEffects = 0; @@ -59,6 +54,12 @@ class FLAT_Pseudo<string opName, dag outs, dag ins, // TODO: M0 if it could possibly access LDS (before gfx9? only)? let Uses = !if(is_flat_global, [EXEC], [EXEC, FLAT_SCR]); + + // Internally, FLAT instruction are executed as both an LDS and a + // Buffer instruction; so, they increment both VM_CNT and LGKM_CNT + // and are not considered done until both have been decremented. + let VM_CNT = 1; + let LGKM_CNT = !if(!or(is_flat_global, is_flat_scratch), 0, 1); } class FLAT_Real <bits<7> op, FLAT_Pseudo ps> : diff --git a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp index 0f009a48754..89b597240eb 100644 --- a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp +++ b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp @@ -1151,8 +1151,7 @@ void SIInsertWaitcnts::updateEventWaitCntAfter( // instruction, update the upper-bound of the appropriate counter's // bracket and the destination operand scores. // TODO: Use the (TSFlags & SIInstrFlags::LGKM_CNT) property everywhere. - uint64_t TSFlags = Inst.getDesc().TSFlags; - if (TII->isDS(Inst) && (TSFlags & SIInstrFlags::LGKM_CNT)) { + if (TII->isDS(Inst) && TII->usesLGKM_CNT(Inst)) { if (TII->getNamedOperand(Inst, AMDGPU::OpName::gds) && TII->getNamedOperand(Inst, AMDGPU::OpName::gds)->getImm() != 0) { ScoreBrackets->updateByEvent(TII, TRI, MRI, GDS_ACCESS, Inst); @@ -1162,8 +1161,12 @@ void SIInsertWaitcnts::updateEventWaitCntAfter( } } else if (TII->isFLAT(Inst)) { assert(Inst.mayLoad() || Inst.mayStore()); - ScoreBrackets->updateByEvent(TII, TRI, MRI, VMEM_ACCESS, Inst); - ScoreBrackets->updateByEvent(TII, TRI, MRI, LDS_ACCESS, Inst); + + if (TII->usesVM_CNT(Inst)) + ScoreBrackets->updateByEvent(TII, TRI, MRI, VMEM_ACCESS, Inst); + + if (TII->usesLGKM_CNT(Inst)) + ScoreBrackets->updateByEvent(TII, TRI, MRI, LDS_ACCESS, Inst); // This is a flat memory operation. Check to see if it has memory // tokens for both LDS and Memory, and if so mark it as a flat. diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.h b/llvm/lib/Target/AMDGPU/SIInstrInfo.h index 3dd5bc89e6c..57a5133e0ed 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.h +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.h @@ -496,6 +496,10 @@ public: return MI.getDesc().TSFlags & SIInstrFlags::VM_CNT; } + static bool usesLGKM_CNT(const MachineInstr &MI) { + return MI.getDesc().TSFlags & SIInstrFlags::LGKM_CNT; + } + static bool sopkIsZext(const MachineInstr &MI) { return MI.getDesc().TSFlags & SIInstrFlags::SOPK_ZEXT; } |

