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authorRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-07-11 08:37:13 +0000
committerRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-07-11 08:37:13 +0000
commit67ddcd6dd08f31c74b4c6662aeb9574651d0c7c7 (patch)
tree5c2c73f5305834cba8df11bf6ee6ac74ad83612c /llvm/lib/Target
parente773c08021b38b185a7eacc0a1ee78ae3237f062 (diff)
downloadbcm5719-llvm-67ddcd6dd08f31c74b4c6662aeb9574651d0c7c7.tar.gz
bcm5719-llvm-67ddcd6dd08f31c74b4c6662aeb9574651d0c7c7.zip
[SystemZ] Allow 8-bit operands to RISBG
RISBG has three 8-bit operands (I3, I4 and I5). I'd originally restricted all three to 6 bits, since that's the only range we intended to use at the time. However, the top bit of I4 acts as a "zero" flag for RISBG, while the top bit of I3 acts as a "test" flag for RNSBG & co. This patch therefore allows them to have the full 8-bit range. I've left the fifth operand as a 6-bit value for now since the upper 2 bits have no defined meaning. llvm-svn: 186070
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/SystemZ/SystemZInstrFormats.td3
1 files changed, 1 insertions, 2 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZInstrFormats.td b/llvm/lib/Target/SystemZ/SystemZInstrFormats.td
index fb530cc5332..7300b90c208 100644
--- a/llvm/lib/Target/SystemZ/SystemZInstrFormats.td
+++ b/llvm/lib/Target/SystemZ/SystemZInstrFormats.td
@@ -1020,8 +1020,7 @@ multiclass CmpSwapRSPair<string mnemonic, bits<8> rsOpcode, bits<16> rsyOpcode,
class RotateSelectRIEf<string mnemonic, bits<16> opcode, RegisterOperand cls1,
RegisterOperand cls2>
: InstRIEf<opcode, (outs cls1:$R1),
- (ins cls1:$R1src, cls2:$R2,
- uimm8zx6:$I3, uimm8zx6:$I4, uimm8zx6:$I5),
+ (ins cls1:$R1src, cls2:$R2, uimm8:$I3, uimm8:$I4, uimm8zx6:$I5),
mnemonic#"\t$R1, $R2, $I3, $I4, $I5", []> {
let Constraints = "$R1 = $R1src";
let DisableEncoding = "$R1src";
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