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authorDevang Patel <dpatel@apple.com>2012-01-10 17:51:54 +0000
committerDevang Patel <dpatel@apple.com>2012-01-10 17:51:54 +0000
commit67bf992a8fc4193d2714d9671a284a536331ec95 (patch)
tree0a41f93ee86c38ff26555f85020d78f1e399c799 /llvm/lib/Target
parent9bdc505c50083652534975dd993985efd0331b44 (diff)
downloadbcm5719-llvm-67bf992a8fc4193d2714d9671a284a536331ec95.tar.gz
bcm5719-llvm-67bf992a8fc4193d2714d9671a284a536331ec95.zip
Add definition for intel asm variant.
Right now, this just adds additional entries in match table. The parser does not use them yet. llvm-svn: 147859
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/X86/X86.td12
1 files changed, 11 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86.td b/llvm/lib/Target/X86/X86.td
index c76d4e51db9..3b2d27c746a 100644
--- a/llvm/lib/Target/X86/X86.td
+++ b/llvm/lib/Target/X86/X86.td
@@ -263,6 +263,16 @@ def ATTAsmParserVariant : AsmParserVariant {
string RegisterPrefix = "%";
}
+def IntelAsmParserVariant : AsmParserVariant {
+ int Variant = 1;
+
+ // Discard comments in assembly strings.
+ string CommentDelimiter = ";";
+
+ // Recognize hard coded registers.
+ string RegisterPrefix = "";
+}
+
//===----------------------------------------------------------------------===//
// Assembly Printers
//===----------------------------------------------------------------------===//
@@ -284,6 +294,6 @@ def X86 : Target {
// Information about the instructions...
let InstructionSet = X86InstrInfo;
let AssemblyParsers = [ATTAsmParser];
- let AssemblyParserVariants = [ATTAsmParserVariant];
+ let AssemblyParserVariants = [ATTAsmParserVariant, IntelAsmParserVariant];
let AssemblyWriters = [ATTAsmWriter, IntelAsmWriter];
}
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