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| author | Tom Stellard <thomas.stellard@amd.com> | 2016-08-29 12:05:32 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2016-08-29 12:05:32 +0000 |
| commit | 662f330852c371e0bdc9443bf34c5052618fc416 (patch) | |
| tree | 414fcf24ca965b4c8eaada00ac2212d24ebf1fde /llvm/lib/Target | |
| parent | 8545dae226162723ee75867288103a9a71d0b91c (diff) | |
| download | bcm5719-llvm-662f330852c371e0bdc9443bf34c5052618fc416.tar.gz bcm5719-llvm-662f330852c371e0bdc9443bf34c5052618fc416.zip | |
AMDGPU/SI: Query AA, if available, in areMemAccessesTriviallyDisjoint()
Summary:
The SILoadStoreOptimizer will need to use AliasAnalysis here in order to
move it before scheduling.
Reviewers: arsenm
Subscribers: arsenm, llvm-commits, kzhuravl
Differential Revision: https://reviews.llvm.org/D23813
llvm-svn: 279963
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp index 2e7ca45c9b3..d781716be19 100644 --- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp +++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp @@ -1350,6 +1350,17 @@ bool SIInstrInfo::areMemAccessesTriviallyDisjoint(MachineInstr &MIa, if (MIa.hasOrderedMemoryRef() || MIb.hasOrderedMemoryRef()) return false; + if (AA && MIa.hasOneMemOperand() && MIb.hasOneMemOperand()) { + const MachineMemOperand *MMOa = *MIa.memoperands_begin(); + const MachineMemOperand *MMOb = *MIb.memoperands_begin(); + if (MMOa->getValue() && MMOb->getValue()) { + MemoryLocation LocA(MMOa->getValue(), MMOa->getSize(), MMOa->getAAInfo()); + MemoryLocation LocB(MMOb->getValue(), MMOb->getSize(), MMOb->getAAInfo()); + if (!AA->alias(LocA, LocB)) + return true; + } + } + // TODO: Should we check the address space from the MachineMemOperand? That // would allow us to distinguish objects we know don't alias based on the // underlying address space, even if it was lowered to a different one, |

