diff options
| author | Daniel Dunbar <daniel@zuster.org> | 2011-02-04 17:12:23 +0000 |
|---|---|---|
| committer | Daniel Dunbar <daniel@zuster.org> | 2011-02-04 17:12:23 +0000 |
| commit | 661934046218e6005cafce1b281b78ac097b2176 (patch) | |
| tree | 6511680f5a0e9033b8bae2ee01399ec37d0139f9 /llvm/lib/Target | |
| parent | 38992cc9df71c1d85b87f453d1ea79eb73ed611e (diff) | |
| download | bcm5719-llvm-661934046218e6005cafce1b281b78ac097b2176.tar.gz bcm5719-llvm-661934046218e6005cafce1b281b78ac097b2176.zip | |
MC/AsmParser: Add support for allowing the conversion process to fail (via
custom conversion functions).
llvm-svn: 124872
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp | 2 |
3 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 16a6bb15379..28fdb60f8a0 100644 --- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -1393,6 +1393,8 @@ MatchAndEmitInstruction(SMLoc IDLoc, } case Match_MnemonicFail: return Error(IDLoc, "unrecognized instruction mnemonic"); + case Match_ConversionFail: + return Error(IDLoc, "unable to convert operands to instruction"); } llvm_unreachable("Implement any new match types added!"); diff --git a/llvm/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp b/llvm/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp index 15d3357cfe8..524f33d1933 100644 --- a/llvm/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp +++ b/llvm/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp @@ -334,6 +334,8 @@ MatchAndEmitInstruction(SMLoc IDLoc, return Error(IDLoc, "instruction use requires an option to be enabled"); case Match_MnemonicFail: return Error(IDLoc, "unrecognized instruction mnemonic"); + case Match_ConversionFail: + return Error(IDLoc, "unable to convert operands to instruction"); case Match_InvalidOperand: ErrorLoc = IDLoc; if (ErrorInfo != ~0U) { diff --git a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp index b5d42ffc8c9..1cac07a0e10 100644 --- a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp +++ b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp @@ -842,6 +842,8 @@ MatchAndEmitInstruction(SMLoc IDLoc, case Match_MissingFeature: Error(IDLoc, "instruction requires a CPU feature not currently enabled"); return true; + case Match_ConversionFail: + return Error(IDLoc, "unable to convert operands to instruction"); case Match_InvalidOperand: WasOriginallyInvalidOperand = true; break; |

