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author | Eric Christopher <echristo@gmail.com> | 2014-05-20 17:11:11 +0000 |
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committer | Eric Christopher <echristo@gmail.com> | 2014-05-20 17:11:11 +0000 |
commit | 650c8f2a06f138d795d0188ec8276638e13f7c9d (patch) | |
tree | 2ba4539a4ad633680680072b4d44811d88488354 /llvm/lib/Target | |
parent | c9e2a689054b63e2c02fddd27b1f508bd57451a3 (diff) | |
download | bcm5719-llvm-650c8f2a06f138d795d0188ec8276638e13f7c9d.tar.gz bcm5719-llvm-650c8f2a06f138d795d0188ec8276638e13f7c9d.zip |
Clean up language and grammar.
Based on a patch by jfcaron3@gmail.com!
PR19806
llvm-svn: 209216
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r-- | llvm/lib/Target/SystemZ/SystemZInstrFormats.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZInstrFormats.td b/llvm/lib/Target/SystemZ/SystemZInstrFormats.td index 50badf82bc7..add675a22cc 100644 --- a/llvm/lib/Target/SystemZ/SystemZInstrFormats.td +++ b/llvm/lib/Target/SystemZ/SystemZInstrFormats.td @@ -516,7 +516,7 @@ class InstSS<bits<8> op, dag outs, dag ins, string asmstr, list<dag> pattern> // // Binary: // One register output operand and two input operands. The first -// input operand is always a register and he second may be a register, +// input operand is always a register and the second may be a register, // immediate or memory. // // Shift: |