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| author | Igor Breger <igor.breger@intel.com> | 2016-06-15 07:30:38 +0000 |
|---|---|---|
| committer | Igor Breger <igor.breger@intel.com> | 2016-06-15 07:30:38 +0000 |
| commit | 64cfd3a44259a8b69d798d305ad61a5a0343f724 (patch) | |
| tree | 06ca3249c0c410e61da7fb08c7236109fe28f8bd /llvm/lib/Target | |
| parent | 4f7a86c74d2378a8f0fc53c703dd6704c5a54913 (diff) | |
| download | bcm5719-llvm-64cfd3a44259a8b69d798d305ad61a5a0343f724.tar.gz bcm5719-llvm-64cfd3a44259a8b69d798d305ad61a5a0343f724.zip | |
[AVX512] Fix BLENDM lowering patterns. Operands should be swapped to match SELECT behavior.
Use BLENDM instead of masked move instruction.
Differential Revision: http://reviews.llvm.org/D21001
llvm-svn: 272763
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrAVX512.td | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/llvm/lib/Target/X86/X86InstrAVX512.td b/llvm/lib/Target/X86/X86InstrAVX512.td index fb00ff7f0ea..5bd9dc7a527 100644 --- a/llvm/lib/Target/X86/X86InstrAVX512.td +++ b/llvm/lib/Target/X86/X86InstrAVX512.td @@ -1242,8 +1242,9 @@ multiclass avx512_blendmask<bits<8> opc, string OpcodeStr, X86VectorVTInfo _> { (ins _.KRCWM:$mask, _.RC:$src1, _.RC:$src2), !strconcat(OpcodeStr, "\t{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2}"), - [(set _.RC:$dst, (X86select _.KRCWM:$mask, (_.VT _.RC:$src1), - (_.VT _.RC:$src2)))]>, EVEX_4V, EVEX_K; + [(set _.RC:$dst, (vselect _.KRCWM:$mask, + (_.VT _.RC:$src2), + (_.VT _.RC:$src1)))]>, EVEX_4V, EVEX_K; let hasSideEffects = 0 in def rrkz : AVX5128I<opc, MRMSrcReg, (outs _.RC:$dst), (ins _.KRCWM:$mask, _.RC:$src1, _.RC:$src2), @@ -1260,8 +1261,9 @@ multiclass avx512_blendmask<bits<8> opc, string OpcodeStr, X86VectorVTInfo _> { (ins _.KRCWM:$mask, _.RC:$src1, _.MemOp:$src2), !strconcat(OpcodeStr, "\t{$src2, $src1, ${dst} {${mask}}|${dst} {${mask}}, $src1, $src2}"), - [(set _.RC:$dst, (X86select _.KRCWM:$mask, (_.VT _.RC:$src1), - (_.VT (bitconvert (_.LdFrag addr:$src2)))))]>, + [(set _.RC:$dst, (vselect _.KRCWM:$mask, + (_.VT (bitconvert (_.LdFrag addr:$src2))), + (_.VT _.RC:$src1)))]>, EVEX_4V, EVEX_K, EVEX_CD8<_.EltSize, CD8VF>; let mayLoad = 1, hasSideEffects = 0 in def rmkz : AVX5128I<opc, MRMSrcMem, (outs _.RC:$dst), @@ -1278,8 +1280,9 @@ multiclass avx512_blendmask_rmb<bits<8> opc, string OpcodeStr, X86VectorVTInfo _ !strconcat(OpcodeStr, "\t{${src2}", _.BroadcastStr, ", $src1, $dst {${mask}}|", "$dst {${mask}}, $src1, ${src2}", _.BroadcastStr, "}"), - [(set _.RC:$dst,(X86select _.KRCWM:$mask, (_.VT _.RC:$src1), - (X86VBroadcast (_.ScalarLdFrag addr:$src2))))]>, + [(set _.RC:$dst,(vselect _.KRCWM:$mask, + (X86VBroadcast (_.ScalarLdFrag addr:$src2)), + (_.VT _.RC:$src1)))]>, EVEX_4V, EVEX_K, EVEX_B, EVEX_CD8<_.EltSize, CD8VF>; let mayLoad = 1, hasSideEffects = 0 in |
