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| author | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2019-05-10 00:09:01 +0000 |
|---|---|---|
| committer | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2019-05-10 00:09:01 +0000 |
| commit | 64196850f0e9b31d1c3bbfcb52ab76d9901f42ef (patch) | |
| tree | f146030665014e73de80f0a8a6deaf317783c341 /llvm/lib/Target | |
| parent | 4fa4df9cdce793667a5c36439a0240965c99687f (diff) | |
| download | bcm5719-llvm-64196850f0e9b31d1c3bbfcb52ab76d9901f42ef.tar.gz bcm5719-llvm-64196850f0e9b31d1c3bbfcb52ab76d9901f42ef.zip | |
[AMDGPU] Pattern for v_xor3_b32
This also allows three op patterns to use increased constant bus
limit of GFX10.
Differential Revision: https://reviews.llvm.org/D61763
llvm-svn: 360395
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/VOP3Instructions.td | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/VOP3Instructions.td b/llvm/lib/Target/AMDGPU/VOP3Instructions.td index 17e9fc6408d..4129aac4d58 100644 --- a/llvm/lib/Target/AMDGPU/VOP3Instructions.td +++ b/llvm/lib/Target/AMDGPU/VOP3Instructions.td @@ -560,7 +560,9 @@ class ThreeOpFrag<SDPatternOperator op1, SDPatternOperator op2> : PatFrag< if (!Operands[i]->isDivergent() && !isInlineImmediate(Operands[i].getNode())) { ConstantBusUses++; - if (ConstantBusUses >= 2) + // This uses AMDGPU::V_ADD3_U32, but all three operand instructions + // have the same constant bus limit. + if (ConstantBusUses > Subtarget->getConstantBusLimit(AMDGPU::V_ADD3_U32)) return false; } } @@ -625,6 +627,7 @@ def : ThreeOp_i32_Pats<xor, add, V_XAD_U32>; let SubtargetPredicate = isGFX10Plus in { def V_XOR3_B32 : VOP3Inst <"v_xor3_b32", VOP3_Profile<VOP_I32_I32_I32_I32>>; + def : ThreeOp_i32_Pats<xor, xor, V_XOR3_B32>; } // End SubtargetPredicate = isGFX10Plus //===----------------------------------------------------------------------===// |
