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authorSimon Pilgrim <llvm-dev@redking.me.uk>2018-10-06 14:51:14 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2018-10-06 14:51:14 +0000
commit62d199f4e53f39ee5e797ee6e4098907c25135f2 (patch)
tree3291d2c14715a921da2a32b730e866750979a83f /llvm/lib/Target
parent944c5305633af0aa8bba16b39a7f661f65713317 (diff)
downloadbcm5719-llvm-62d199f4e53f39ee5e797ee6e4098907c25135f2.tar.gz
bcm5719-llvm-62d199f4e53f39ee5e797ee6e4098907c25135f2.zip
[X86] combinePMULDQ - add op back to worklist if SimplifyDemandedBits succeeds on either operand
Prevents missing other simplifications that may occur deep in the operand chain where CommitTargetLoweringOpt won't add the PMULDQ back to the worklist itself llvm-svn: 343922
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp8
1 files changed, 6 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index cb4eea7d009..e113dbc6760 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -40317,10 +40317,14 @@ static SDValue combinePMULDQ(SDNode *N, SelectionDAG &DAG,
APInt DemandedMask(APInt::getLowBitsSet(64, 32));
// PMULQDQ/PMULUDQ only uses lower 32 bits from each vector element.
- if (TLI.SimplifyDemandedBits(LHS, DemandedMask, DCI))
+ if (TLI.SimplifyDemandedBits(LHS, DemandedMask, DCI)) {
+ DCI.AddToWorklist(N);
return SDValue(N, 0);
- if (TLI.SimplifyDemandedBits(RHS, DemandedMask, DCI))
+ }
+ if (TLI.SimplifyDemandedBits(RHS, DemandedMask, DCI)) {
+ DCI.AddToWorklist(N);
return SDValue(N, 0);
+ }
return SDValue();
}
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