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| author | Pawel Bylica <chfast@gmail.com> | 2015-07-09 09:50:54 +0000 |
|---|---|---|
| committer | Pawel Bylica <chfast@gmail.com> | 2015-07-09 09:50:54 +0000 |
| commit | 627762fda5e397cb012897b88e4a85b90aff3cec (patch) | |
| tree | c8cf1435d5aecf06390e56012f7683e8215f809f /llvm/lib/Target | |
| parent | 0a0739743312c3160f25b17d3477cdd376cb32d5 (diff) | |
| download | bcm5719-llvm-627762fda5e397cb012897b88e4a85b90aff3cec.tar.gz bcm5719-llvm-627762fda5e397cb012897b88e4a85b90aff3cec.zip | |
Revert r241790: Fix shift legalization and lowering for big constants.
llvm-svn: 241792
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 559056d6b2f..e58189f55c1 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -23167,7 +23167,7 @@ static SDValue PerformSHLCombine(SDNode *N, SelectionDAG &DAG) { // We shift all of the values by one. In many cases we do not have // hardware support for this operation. This is better expressed as an ADD // of two values. - if (N1SplatC->getAPIntValue() == 1) + if (N1SplatC->getZExtValue() == 1) return DAG.getNode(ISD::ADD, SDLoc(N), VT, N0, N0); } |
