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authorStanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>2019-10-21 13:43:01 -0700
committerStanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>2019-10-23 18:42:48 -0700
commit61e7a61bdccfae2c55e1ab598621204030feac7a (patch)
tree71908d01bcba9e7b43121c52dfeb4e1f6a1f5767 /llvm/lib/Target
parente3d26b42b95c658ac5805188291f4316b47a15dd (diff)
downloadbcm5719-llvm-61e7a61bdccfae2c55e1ab598621204030feac7a.tar.gz
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[AMDGPU] Allow folding of sgpr to vgpr copy
Potentially sgpr to sgpr copy should also be possible. That is however trickier because we may end up with a wrong register class at use because of xm0/xexec permutations. Differential Revision: https://reviews.llvm.org/D69280
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/AMDGPU/SIFoldOperands.cpp5
1 files changed, 3 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
index 69ac367f7ab..a0e43101a7f 100644
--- a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
+++ b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
@@ -627,10 +627,11 @@ void SIFoldOperands::foldOperand(
CopiesToReplace.push_back(UseMI);
} else {
if (UseMI->isCopy() && OpToFold.isReg() &&
- Register::isVirtualRegister(UseMI->getOperand(0).getReg()) &&
+ UseMI->getOperand(0).getReg().isVirtual() &&
TRI->isVectorRegister(*MRI, UseMI->getOperand(0).getReg()) &&
- TRI->isVectorRegister(*MRI, UseMI->getOperand(1).getReg()) &&
!UseMI->getOperand(1).getSubReg()) {
+ LLVM_DEBUG(dbgs() << "Folding " << OpToFold
+ << "\n into " << *UseMI << '\n');
unsigned Size = TII->getOpSize(*UseMI, 1);
UseMI->getOperand(1).setReg(OpToFold.getReg());
UseMI->getOperand(1).setSubReg(OpToFold.getSubReg());
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