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| author | Geoff Berry <gberry@codeaurora.org> | 2017-06-19 21:57:44 +0000 |
|---|---|---|
| committer | Geoff Berry <gberry@codeaurora.org> | 2017-06-19 21:57:44 +0000 |
| commit | 5e46600e3a091d7190132e0499441b2dda3e2853 (patch) | |
| tree | f57bca65a0a3885f259f527a481c4497cd64d17a /llvm/lib/Target | |
| parent | e9972cabbdccb4935cced8e60e1dd9b897a0252e (diff) | |
| download | bcm5719-llvm-5e46600e3a091d7190132e0499441b2dda3e2853.tar.gz bcm5719-llvm-5e46600e3a091d7190132e0499441b2dda3e2853.zip | |
[AArch64][Falkor] Fix MOVZ sched predicate to not assert on non-imm operands (e.g. blockaddress).
llvm-svn: 305752
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64SchedFalkorDetails.td | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64SchedFalkorDetails.td b/llvm/lib/Target/AArch64/AArch64SchedFalkorDetails.td index 5e5e089f963..6081fbdcb0b 100644 --- a/llvm/lib/Target/AArch64/AArch64SchedFalkorDetails.td +++ b/llvm/lib/Target/AArch64/AArch64SchedFalkorDetails.td @@ -519,7 +519,8 @@ def FalkorReadIncSt : SchedReadAdvance<1, [FalkorWr_LdStInc_none_3cyc]>; // SchedPredicates and WriteVariants for Immediate Zero and LSLFast/ASRFast // ----------------------------------------------------------------------------- -def FalkorImmZPred : SchedPredicate<[{MI->getOperand(1).getImm() == 0}]>; +def FalkorImmZPred : SchedPredicate<[{MI->getOperand(1).isImm() && + MI->getOperand(1).getImm() == 0}]>; def FalkorOp1ZrReg : SchedPredicate<[{MI->getOperand(1).getReg() == AArch64::WZR || MI->getOperand(1).getReg() == AArch64::XZR}]>; |
