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| author | Tom Stellard <thomas.stellard@amd.com> | 2016-02-05 18:29:17 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2016-02-05 18:29:17 +0000 |
| commit | 5dde1d2eb35ab6f2cd2386d6be016782a522f88b (patch) | |
| tree | b89339a320f51b32958975f0e9e408879867675f /llvm/lib/Target | |
| parent | 6da9115e5368fbbcce2ce76c4bd6ceb81a5694c3 (diff) | |
| download | bcm5719-llvm-5dde1d2eb35ab6f2cd2386d6be016782a522f88b.tar.gz bcm5719-llvm-5dde1d2eb35ab6f2cd2386d6be016782a522f88b.zip | |
AMDGPU: Fix ordering of CPU and FS parameters in TargetMachine constructors
Reviewers: arsenm
Subscribers: arsenm, llvm-commits
Differential Revision: http://reviews.llvm.org/D16863
llvm-svn: 259897
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 8 | ||||
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h | 12 |
2 files changed, 10 insertions, 10 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp index 8086f2f8c61..c9efb57af59 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp @@ -124,20 +124,20 @@ AMDGPUTargetMachine::~AMDGPUTargetMachine() { } //===----------------------------------------------------------------------===// R600TargetMachine::R600TargetMachine(const Target &T, const Triple &TT, - StringRef FS, StringRef CPU, + StringRef CPU, StringRef FS, TargetOptions Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) - : AMDGPUTargetMachine(T, TT, FS, CPU, Options, RM, CM, OL) {} + : AMDGPUTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {} //===----------------------------------------------------------------------===// // GCN Target Machine (SI+) //===----------------------------------------------------------------------===// GCNTargetMachine::GCNTargetMachine(const Target &T, const Triple &TT, - StringRef FS, StringRef CPU, + StringRef CPU, StringRef FS, TargetOptions Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) - : AMDGPUTargetMachine(T, TT, FS, CPU, Options, RM, CM, OL) {} + : AMDGPUTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {} //===----------------------------------------------------------------------===// // AMDGPU Pass Setup diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h index 236e3f82403..58fb9ffb5fa 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h +++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h @@ -37,8 +37,8 @@ protected: AMDGPUIntrinsicInfo IntrinsicInfo; public: - AMDGPUTargetMachine(const Target &T, const Triple &TT, StringRef FS, - StringRef CPU, TargetOptions Options, Reloc::Model RM, + AMDGPUTargetMachine(const Target &T, const Triple &TT, StringRef CPU, + StringRef FS, TargetOptions Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL); ~AMDGPUTargetMachine(); @@ -63,8 +63,8 @@ public: class R600TargetMachine : public AMDGPUTargetMachine { public: - R600TargetMachine(const Target &T, const Triple &TT, StringRef FS, - StringRef CPU, TargetOptions Options, Reloc::Model RM, + R600TargetMachine(const Target &T, const Triple &TT, StringRef CPU, + StringRef FS, TargetOptions Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL); TargetPassConfig *createPassConfig(PassManagerBase &PM) override; @@ -77,8 +77,8 @@ public: class GCNTargetMachine : public AMDGPUTargetMachine { public: - GCNTargetMachine(const Target &T, const Triple &TT, StringRef FS, - StringRef CPU, TargetOptions Options, Reloc::Model RM, + GCNTargetMachine(const Target &T, const Triple &TT, StringRef CPU, + StringRef FS, TargetOptions Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL); TargetPassConfig *createPassConfig(PassManagerBase &PM) override; |
