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author | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2016-04-26 00:00:48 +0000 |
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committer | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2016-04-26 00:00:48 +0000 |
commit | 5cf735a5b1f05e7a81a5cd1dc1fdacc5021e4dd2 (patch) | |
tree | 03b6d9b01059f928023a545c359950b1cf317dfa /llvm/lib/Target | |
parent | 07c8c4475fb1fe9746027b91f2e4cfea3061e34a (diff) | |
download | bcm5719-llvm-5cf735a5b1f05e7a81a5cd1dc1fdacc5021e4dd2.tar.gz bcm5719-llvm-5cf735a5b1f05e7a81a5cd1dc1fdacc5021e4dd2.zip |
[X86] Use LivePhysRegs in X86FixupBWInsts.
Kill-flags, which computeRegisterLiveness uses, are not reliable.
LivePhysRegs is.
Differential Revision: http://reviews.llvm.org/D19472
llvm-svn: 267495
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r-- | llvm/lib/Target/X86/X86FixupBWInsts.cpp | 32 |
1 files changed, 19 insertions, 13 deletions
diff --git a/llvm/lib/Target/X86/X86FixupBWInsts.cpp b/llvm/lib/Target/X86/X86FixupBWInsts.cpp index 1f8a4406add..8b212127881 100644 --- a/llvm/lib/Target/X86/X86FixupBWInsts.cpp +++ b/llvm/lib/Target/X86/X86FixupBWInsts.cpp @@ -49,7 +49,7 @@ #include "X86InstrInfo.h" #include "X86Subtarget.h" #include "llvm/ADT/Statistic.h" -#include "llvm/CodeGen/LiveVariables.h" +#include "llvm/CodeGen/LivePhysRegs.h" #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineInstrBuilder.h" #include "llvm/CodeGen/MachineLoopInfo.h" @@ -81,7 +81,7 @@ class FixupBWInstPass : public MachineFunctionPass { /// \brief Loop over all of the instructions in the basic block /// replacing applicable byte or word instructions with better /// alternatives. - void processBasicBlock(MachineFunction &MF, MachineBasicBlock &MBB) const; + void processBasicBlock(MachineFunction &MF, MachineBasicBlock &MBB); /// \brief This sets the \p SuperDestReg to the 32 bit super reg /// of the original destination register of the MachineInstr @@ -128,6 +128,9 @@ private: /// Machine loop info used for guiding some heruistics. MachineLoopInfo *MLI; + + /// Register Liveness information after the current instruction. + LivePhysRegs LiveRegs; }; char FixupBWInstPass::ID = 0; } @@ -142,6 +145,7 @@ bool FixupBWInstPass::runOnMachineFunction(MachineFunction &MF) { TII = MF.getSubtarget<X86Subtarget>().getInstrInfo(); OptForSize = MF.getFunction()->optForSize(); MLI = &getAnalysis<MachineLoopInfo>(); + LiveRegs.init(&TII->getRegisterInfo()); DEBUG(dbgs() << "Start X86FixupBWInsts\n";); @@ -181,11 +185,7 @@ bool FixupBWInstPass::getSuperRegDestIfDead(MachineInstr *OrigMI, if (getX86SubSuperRegister(SuperDestReg, OrigDestSize) != OrigDestReg) return false; - MachineBasicBlock::LivenessQueryResult LQR = - OrigMI->getParent()->computeRegisterLiveness(&TII->getRegisterInfo(), - SuperDestReg, OrigMI); - - if (LQR != MachineBasicBlock::LQR_Dead) + if (LiveRegs.contains(SuperDestReg)) return false; if (OrigDestSize == 8) { @@ -194,9 +194,7 @@ bool FixupBWInstPass::getSuperRegDestIfDead(MachineInstr *OrigMI, // whether the super-register is dead. unsigned UpperByteReg = getX86SubSuperRegister(SuperDestReg, 8, true); - LQR = OrigMI->getParent()->computeRegisterLiveness(&TII->getRegisterInfo(), - UpperByteReg, OrigMI); - if (LQR != MachineBasicBlock::LQR_Dead) + if (LiveRegs.contains(UpperByteReg)) return false; } @@ -229,7 +227,7 @@ MachineInstr *FixupBWInstPass::tryReplaceLoad(unsigned New32BitOpcode, } void FixupBWInstPass::processBasicBlock(MachineFunction &MF, - MachineBasicBlock &MBB) const { + MachineBasicBlock &MBB) { // This algorithm doesn't delete the instructions it is replacing // right away. By leaving the existing instructions in place, the @@ -243,9 +241,14 @@ void FixupBWInstPass::processBasicBlock(MachineFunction &MF, // from making it seem as if the larger register might be live. SmallVector<std::pair<MachineInstr *, MachineInstr *>, 8> MIReplacements; - for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end(); ++I) { + // Start computing liveness for this block. We iterate from the end to be able + // to update this for each instruction. + LiveRegs.clear(); + LiveRegs.addLiveOuts(&MBB); + + for (auto I = MBB.rbegin(); I != MBB.rend(); ++I) { MachineInstr *NewMI = nullptr; - MachineInstr *MI = I; + MachineInstr *MI = &*I; // See if this is an instruction of the type we are currently looking for. switch (MI->getOpcode()) { @@ -275,6 +278,9 @@ void FixupBWInstPass::processBasicBlock(MachineFunction &MF, if (NewMI) MIReplacements.push_back(std::make_pair(MI, NewMI)); + + // We're done with this instruction, update liveness for the next one. + LiveRegs.stepBackward(*MI); } while (!MIReplacements.empty()) { |