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| author | Lang Hames <lhames@gmail.com> | 2012-02-17 00:27:16 +0000 |
|---|---|---|
| committer | Lang Hames <lhames@gmail.com> | 2012-02-17 00:27:16 +0000 |
| commit | 5bade3dc6ed11b39f5ac460a33e65c80d7a44df1 (patch) | |
| tree | b984dfce659196b505ff88866e461528ede57042 /llvm/lib/Target | |
| parent | 0d72bb49f0687704aeed405fa58a8fac27e2dddf (diff) | |
| download | bcm5719-llvm-5bade3dc6ed11b39f5ac460a33e65c80d7a44df1.tar.gz bcm5719-llvm-5bade3dc6ed11b39f5ac460a33e65c80d7a44df1.zip | |
Re-enable 150652 and 150654 - Make FPSCR non-reserved, and make MachineCSE bail on reserved registers. This *should* be safe as of r150786.
llvm-svn: 150769
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp index 6a46e636267..9c8486c9bcd 100644 --- a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp +++ b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp @@ -79,7 +79,6 @@ getReservedRegs(const MachineFunction &MF) const { BitVector Reserved(getNumRegs()); Reserved.set(ARM::SP); Reserved.set(ARM::PC); - Reserved.set(ARM::FPSCR); if (TFI->hasFP(MF)) Reserved.set(FramePtr); if (hasBasePointer(MF)) |
