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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-03-06 18:44:11 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-03-06 18:44:11 +0000 |
| commit | 579e701fd93d31db44b3b1ee70e8926fdf927654 (patch) | |
| tree | db27845dc671673b30a0a4aa47ad298930b2c148 /llvm/lib/Target | |
| parent | 197c68c856d02941add7b8469b0f82d4ea13a93b (diff) | |
| download | bcm5719-llvm-579e701fd93d31db44b3b1ee70e8926fdf927654.tar.gz bcm5719-llvm-579e701fd93d31db44b3b1ee70e8926fdf927654.zip | |
Allow the same types in DPair as in QPR.
llvm-svn: 152129
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMRegisterInfo.td | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMRegisterInfo.td b/llvm/lib/Target/ARM/ARMRegisterInfo.td index bbd8c92720d..527e8b5a6ab 100644 --- a/llvm/lib/Target/ARM/ARMRegisterInfo.td +++ b/llvm/lib/Target/ARM/ARMRegisterInfo.td @@ -309,7 +309,8 @@ def TuplesOE2D : RegisterTuples<[dsub_0, dsub_1], // Register class representing a pair of consecutive D registers. // Use the Q registers for the even-odd pairs. -def DPair : RegisterClass<"ARM", [v2i64], 128, (interleave QPR, TuplesOE2D)> { +def DPair : RegisterClass<"ARM", [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64], + 128, (interleave QPR, TuplesOE2D)> { // Allocate starting at non-VFP2 registers D16-D31 first. let AltOrders = [(rotl DPair, 16)]; let AltOrderSelect = [{ return 1; }]; |
