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authorCraig Topper <craig.topper@intel.com>2020-04-30 17:25:37 -0700
committerTom Stellard <tstellar@redhat.com>2020-06-11 16:09:24 -0700
commit56c6099f23841b09edbb6bb4607f8aa417ede9c2 (patch)
treeec55968a8a3027ac25e721f6b1bc8df337f46fd7 /llvm/lib/Target
parentb6efa2365812f31667485c8948d49621ebf952f2 (diff)
downloadbcm5719-llvm-56c6099f23841b09edbb6bb4607f8aa417ede9c2.tar.gz
bcm5719-llvm-56c6099f23841b09edbb6bb4607f8aa417ede9c2.zip
[X86] Add x, t and g modifiers for inline asm
This patch adds the x, t and g modifiers for inline asm from GCC. These will print a vector register as xmm*, ymm* or zmm* respectively. I also fixed register names with modifiers with inteldialect so they are no longer printed with a leading %. Patch by Amanieu d'Antras Differential Revision: https://reviews.llvm.org/D78977 (cherry picked from commit c5f7c039efe7ff09a44cfd252f6cb001ceed6269)
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/X86/X86AsmPrinter.cpp46
1 files changed, 45 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86AsmPrinter.cpp b/llvm/lib/Target/X86/X86AsmPrinter.cpp
index 39d16e7999c..1ac291fcb88 100644
--- a/llvm/lib/Target/X86/X86AsmPrinter.cpp
+++ b/llvm/lib/Target/X86/X86AsmPrinter.cpp
@@ -404,7 +404,7 @@ void X86AsmPrinter::PrintIntelMemReference(const MachineInstr *MI,
static bool printAsmMRegister(X86AsmPrinter &P, const MachineOperand &MO,
char Mode, raw_ostream &O) {
Register Reg = MO.getReg();
- bool EmitPercent = true;
+ bool EmitPercent = MO.getParent()->getInlineAsmDialect() == InlineAsm::AD_ATT;
if (!X86::GR8RegClass.contains(Reg) &&
!X86::GR16RegClass.contains(Reg) &&
@@ -443,6 +443,42 @@ static bool printAsmMRegister(X86AsmPrinter &P, const MachineOperand &MO,
return false;
}
+static bool printAsmVRegister(X86AsmPrinter &P, const MachineOperand &MO,
+ char Mode, raw_ostream &O) {
+ unsigned Reg = MO.getReg();
+ bool EmitPercent = MO.getParent()->getInlineAsmDialect() == InlineAsm::AD_ATT;
+
+ unsigned Index;
+ if (X86::VR128XRegClass.contains(Reg))
+ Index = Reg - X86::XMM0;
+ else if (X86::VR256XRegClass.contains(Reg))
+ Index = Reg - X86::YMM0;
+ else if (X86::VR512RegClass.contains(Reg))
+ Index = Reg - X86::ZMM0;
+ else
+ return true;
+
+ switch (Mode) {
+ default: // Unknown mode.
+ return true;
+ case 'x': // Print V4SFmode register
+ Reg = X86::XMM0 + Index;
+ break;
+ case 't': // Print V8SFmode register
+ Reg = X86::YMM0 + Index;
+ break;
+ case 'g': // Print V16SFmode register
+ Reg = X86::ZMM0 + Index;
+ break;
+ }
+
+ if (EmitPercent)
+ O << '%';
+
+ O << X86ATTInstPrinter::getRegisterName(Reg);
+ return false;
+}
+
/// PrintAsmOperand - Print out an operand for an inline asm expression.
///
bool X86AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
@@ -517,6 +553,14 @@ bool X86AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
PrintOperand(MI, OpNo, O);
return false;
+ case 'x': // Print V4SFmode register
+ case 't': // Print V8SFmode register
+ case 'g': // Print V16SFmode register
+ if (MO.isReg())
+ return printAsmVRegister(*this, MO, ExtraCode[0], O);
+ PrintOperand(MI, OpNo, O);
+ return false;
+
case 'P': // This is the operand of a call, treat specially.
PrintPCRelImm(MI, OpNo, O);
return false;
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