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authorKrzysztof Parzyszek <kparzysz@codeaurora.org>2017-12-18 18:21:01 +0000
committerKrzysztof Parzyszek <kparzysz@codeaurora.org>2017-12-18 18:21:01 +0000
commit5439a70d973d689ec3d35bea523b9e05204f13c8 (patch)
tree89d8ce57406aabdbc353e8df40f842162c0ce185 /llvm/lib/Target
parentd89d0b6494d3d50ed69380e7f76169b03de928cd (diff)
downloadbcm5719-llvm-5439a70d973d689ec3d35bea523b9e05204f13c8.tar.gz
bcm5719-llvm-5439a70d973d689ec3d35bea523b9e05204f13c8.zip
[Hexagon] Prefer to widen HVX vectors instead of promoting
llvm-svn: 321002
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/Hexagon/HexagonISelLowering.cpp12
-rw-r--r--llvm/lib/Target/Hexagon/HexagonISelLowering.h2
2 files changed, 14 insertions, 0 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
index 6ae52701f7f..6387ac2ef67 100644
--- a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
@@ -2323,6 +2323,18 @@ bool HexagonTargetLowering::isShuffleMaskLegal(ArrayRef<int> Mask,
return true;
}
+TargetLoweringBase::LegalizeTypeAction
+HexagonTargetLowering::getPreferredVectorAction(EVT VT) const {
+ if (Subtarget.useHVXOps()) {
+ // If the size of VT is at least half of the vector length,
+ // widen the vector. Note: the threshold was not selected in
+ // any scientific way.
+ if (VT.getSizeInBits() >= Subtarget.getVectorLength()*8/2)
+ return TargetLoweringBase::TypeWidenVector;
+ }
+ return TargetLowering::getPreferredVectorAction(VT);
+}
+
// Lower a vector shuffle (V1, V2, V3). V1 and V2 are the two vectors
// to select data from, V3 is the permutation.
SDValue
diff --git a/llvm/lib/Target/Hexagon/HexagonISelLowering.h b/llvm/lib/Target/Hexagon/HexagonISelLowering.h
index 07f8b0c9c14..2705fcbf8d6 100644
--- a/llvm/lib/Target/Hexagon/HexagonISelLowering.h
+++ b/llvm/lib/Target/Hexagon/HexagonISelLowering.h
@@ -122,6 +122,8 @@ namespace HexagonISD {
unsigned DefinedValues) const override;
bool isShuffleMaskLegal(ArrayRef<int> Mask, EVT VT) const override;
+ TargetLoweringBase::LegalizeTypeAction getPreferredVectorAction(EVT VT)
+ const override;
SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
const char *getTargetNodeName(unsigned Opcode) const override;
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