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authorChad Rosier <mcrosier@apple.com>2012-05-11 17:41:06 +0000
committerChad Rosier <mcrosier@apple.com>2012-05-11 17:41:06 +0000
commit519b12f927c4a0442dc5d32e65413762e6da7548 (patch)
tree7a36d03832512a5358f6daf97a46f1b08f23e866 /llvm/lib/Target
parent466d3d8faad04f77109c98eebe7e606d85c098dc (diff)
downloadbcm5719-llvm-519b12f927c4a0442dc5d32e65413762e6da7548.tar.gz
bcm5719-llvm-519b12f927c4a0442dc5d32e65413762e6da7548.zip
[fast-isel] Rather then assert (or segfault in a non-asserts build), fall back
to selection DAG isel if we're unable to handle a non-double multi-reg retval. rdar://11430407 PR12796 llvm-svn: 156622
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/ARM/ARMFastISel.cpp6
1 files changed, 4 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMFastISel.cpp b/llvm/lib/Target/ARM/ARMFastISel.cpp
index f3d930fbe0f..f49a5d3f83c 100644
--- a/llvm/lib/Target/ARM/ARMFastISel.cpp
+++ b/llvm/lib/Target/ARM/ARMFastISel.cpp
@@ -2014,8 +2014,7 @@ bool ARMFastISel::FinishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs,
// Finally update the result.
UpdateValueMap(I, ResultReg);
- } else {
- assert(RVLocs.size() == 1 &&"Can't handle non-double multi-reg retvals!");
+ } else if (RVLocs.size() == 1) {
EVT CopyVT = RVLocs[0].getValVT();
// Special handling for extended integers.
@@ -2031,6 +2030,9 @@ bool ARMFastISel::FinishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs,
// Finally update the result.
UpdateValueMap(I, ResultReg);
+ } else {
+ // Can't handle non-double multi-reg retvals.
+ return false;
}
}
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