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author | Simon Atanasyan <simon@atanasyan.com> | 2016-12-12 17:40:26 +0000 |
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committer | Simon Atanasyan <simon@atanasyan.com> | 2016-12-12 17:40:26 +0000 |
commit | 5048514c208a2180933b090251c36d78c9ae119d (patch) | |
tree | b41e61452df46bfb720b175909c79fb9d4d36343 /llvm/lib/Target | |
parent | f45ea4bbc587a171b0643428de1c2693259cb072 (diff) | |
download | bcm5719-llvm-5048514c208a2180933b090251c36d78c9ae119d.tar.gz bcm5719-llvm-5048514c208a2180933b090251c36d78c9ae119d.zip |
[mips] For PIC code convert unconditional jump to unconditional branch
Unconditional branch uses relative addressing which is the right choice
in case of position independent code.
This is a fix for the bug:
https://dmz-portal.mips.com/bugz/show_bug.cgi?id=2445
Differential revision: https://reviews.llvm.org/D27483
llvm-svn: 289448
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r-- | llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp index e6234d14bda..97ca11ca501 100644 --- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -1786,6 +1786,17 @@ bool MipsAsmParser::processInstruction(MCInst &Inst, SMLoc IDLoc, } } + // For PIC code convert unconditional jump to unconditional branch. + if ((Inst.getOpcode() == Mips::J || Inst.getOpcode() == Mips::J_MM) && + inPicMode()) { + MCInst BInst; + BInst.setOpcode(inMicroMipsMode() ? Mips::BEQ_MM : Mips::BEQ); + BInst.addOperand(MCOperand::createReg(Mips::ZERO)); + BInst.addOperand(MCOperand::createReg(Mips::ZERO)); + BInst.addOperand(Inst.getOperand(0)); + Inst = BInst; + } + // This expansion is not in a function called by tryExpandInstruction() // because the pseudo-instruction doesn't have a distinct opcode. if ((Inst.getOpcode() == Mips::JAL || Inst.getOpcode() == Mips::JAL_MM) && |