summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target
diff options
context:
space:
mode:
authorHans Wennborg <hans@hanshq.net>2014-01-25 01:18:18 +0000
committerHans Wennborg <hans@hanshq.net>2014-01-25 01:18:18 +0000
commit4d67a2e85a39c798faf77e79076cde827c82c237 (patch)
tree7aec992a93f2eb3a14f0998c4a755eb42d835fb0 /llvm/lib/Target
parent955231ddf6cbb54f0931b78eb6e9b3f18438b5d4 (diff)
downloadbcm5719-llvm-4d67a2e85a39c798faf77e79076cde827c82c237.tar.gz
bcm5719-llvm-4d67a2e85a39c798faf77e79076cde827c82c237.zip
Revert "Add Constant Hoisting Pass" (r200034)
This commit caused -Woverloaded-virtual warnings. The two new TargetTransformInfo::getIntImmCost functions were only added to the superclass, and to the X86 subclass. The other targets were not updated, and the warning highlighted this by pointing out that e.g. ARMTTI::getIntImmCost was hiding the two new getIntImmCost variants. We could pacify the warning by adding "using TargetTransformInfo::getIntImmCost" to the various subclasses, or turning it off, but I suspect that it's wrong to leave the functions unimplemnted in those targets. The default implementations return TCC_Free, which I don't think is right e.g. for ARM. llvm-svn: 200058
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/X86/X86TargetTransformInfo.cpp95
1 files changed, 0 insertions, 95 deletions
diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
index 781be2fddd9..da2b021da93 100644
--- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -18,7 +18,6 @@
#include "X86.h"
#include "X86TargetMachine.h"
#include "llvm/Analysis/TargetTransformInfo.h"
-#include "llvm/IR/IntrinsicInst.h"
#include "llvm/Support/Debug.h"
#include "llvm/Target/CostTable.h"
#include "llvm/Target/TargetLowering.h"
@@ -108,14 +107,6 @@ public:
virtual unsigned getReductionCost(unsigned Opcode, Type *Ty,
bool IsPairwiseForm) const LLVM_OVERRIDE;
- virtual unsigned getIntImmCost(const APInt &Imm,
- Type *Ty) const LLVM_OVERRIDE;
-
- virtual unsigned getIntImmCost(unsigned Opcode, const APInt &Imm,
- Type *Ty) const LLVM_OVERRIDE;
- virtual unsigned getIntImmCost(Intrinsic::ID IID, const APInt &Imm,
- Type *Ty) const LLVM_OVERRIDE;
-
/// @}
};
@@ -703,89 +694,3 @@ unsigned X86TTI::getReductionCost(unsigned Opcode, Type *ValTy,
return TargetTransformInfo::getReductionCost(Opcode, ValTy, IsPairwise);
}
-unsigned X86TTI::getIntImmCost(const APInt &Imm, Type *Ty) const {
- assert(Ty->isIntegerTy());
-
- unsigned BitSize = Ty->getPrimitiveSizeInBits();
- if (BitSize == 0)
- return ~0U;
-
- if (Imm.getBitWidth() <= 64 &&
- (isInt<32>(Imm.getSExtValue()) || isUInt<32>(Imm.getZExtValue())))
- return TCC_Basic;
- else
- return 2 * TCC_Basic;
-}
-
-unsigned X86TTI::getIntImmCost(unsigned Opcode, const APInt &Imm,
- Type *Ty) const {
- assert(Ty->isIntegerTy());
-
- unsigned BitSize = Ty->getPrimitiveSizeInBits();
- if (BitSize == 0)
- return ~0U;
-
- switch (Opcode) {
- case Instruction::Add:
- case Instruction::Sub:
- case Instruction::Mul:
- case Instruction::UDiv:
- case Instruction::SDiv:
- case Instruction::URem:
- case Instruction::SRem:
- case Instruction::Shl:
- case Instruction::LShr:
- case Instruction::AShr:
- case Instruction::And:
- case Instruction::Or:
- case Instruction::Xor:
- case Instruction::ICmp:
- if (Imm.getBitWidth() <= 64 && isInt<32>(Imm.getSExtValue()))
- return TCC_Free;
- else
- return X86TTI::getIntImmCost(Imm, Ty);
- case Instruction::Trunc:
- case Instruction::ZExt:
- case Instruction::SExt:
- case Instruction::IntToPtr:
- case Instruction::PtrToInt:
- case Instruction::BitCast:
- case Instruction::Call:
- case Instruction::Select:
- case Instruction::Ret:
- case Instruction::Load:
- case Instruction::Store:
- return X86TTI::getIntImmCost(Imm, Ty);
- }
- return TargetTransformInfo::getIntImmCost(Opcode, Imm, Ty);
-}
-
-unsigned X86TTI::getIntImmCost(Intrinsic::ID IID, const APInt &Imm,
- Type *Ty) const {
- assert(Ty->isIntegerTy());
-
- unsigned BitSize = Ty->getPrimitiveSizeInBits();
- if (BitSize == 0)
- return ~0U;
-
- switch (IID) {
- default: return TargetTransformInfo::getIntImmCost(IID, Imm, Ty);
- case Intrinsic::sadd_with_overflow:
- case Intrinsic::uadd_with_overflow:
- case Intrinsic::ssub_with_overflow:
- case Intrinsic::usub_with_overflow:
- case Intrinsic::smul_with_overflow:
- case Intrinsic::umul_with_overflow:
- if (Imm.getBitWidth() <= 64 && isInt<32>(Imm.getSExtValue()))
- return TCC_Free;
- else
- return X86TTI::getIntImmCost(Imm, Ty);
- case Intrinsic::experimental_stackmap:
- case Intrinsic::experimental_patchpoint_void:
- case Intrinsic::experimental_patchpoint_i64:
- if (Imm.getBitWidth() <= 64 && isInt<64>(Imm.getSExtValue()))
- return TCC_Free;
- else
- return X86TTI::getIntImmCost(Imm, Ty);
- }
-}
OpenPOWER on IntegriCloud