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authorChris Lattner <sabre@nondot.org>2004-08-15 22:15:56 +0000
committerChris Lattner <sabre@nondot.org>2004-08-15 22:15:56 +0000
commit48a3b942ae919be21890d682d3e4cba4ae95d21d (patch)
treec7e18ece738fa4cd1b693a3281c8f13428544a30 /llvm/lib/Target
parent772f0d4106c2f5b77f25a547265b5578d2446374 (diff)
downloadbcm5719-llvm-48a3b942ae919be21890d682d3e4cba4ae95d21d.tar.gz
bcm5719-llvm-48a3b942ae919be21890d682d3e4cba4ae95d21d.zip
Insertion methods now return void instead of #instrs inserted. Also, use
more powerful forms of BuildMI to concisify the code llvm-svn: 15782
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/PowerPC/PowerPCRegisterInfo.cpp38
-rw-r--r--llvm/lib/Target/PowerPC/PowerPCRegisterInfo.h18
2 files changed, 25 insertions, 31 deletions
diff --git a/llvm/lib/Target/PowerPC/PowerPCRegisterInfo.cpp b/llvm/lib/Target/PowerPC/PowerPCRegisterInfo.cpp
index b1e3dd2b5c4..ef0c485d542 100644
--- a/llvm/lib/Target/PowerPC/PowerPCRegisterInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PowerPCRegisterInfo.cpp
@@ -68,7 +68,7 @@ static unsigned getIdx(const TargetRegisterClass *RC) {
abort();
}
-int
+void
PowerPCRegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
unsigned SrcReg, int FrameIdx) const {
@@ -79,17 +79,15 @@ PowerPCRegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
unsigned OC = Opcode[getIdx(RC)];
if (SrcReg == PPC::LR) {
- MBB.insert(MI, BuildMI(PPC::MFLR, 0, PPC::R0));
- MBB.insert(MI, addFrameReference(BuildMI(OC,3).addReg(PPC::R0),FrameIdx));
- return 2;
+ BuildMI(MBB, MI, PPC::MFLR, 0, PPC::R0);
+ addFrameReference(BuildMI(MBB, MI, OC, 3).addReg(PPC::R0),FrameIdx);
} else {
- MBB.insert(MI, BuildMI(PPC::IMPLICIT_DEF, 0, PPC::R0));
- MBB.insert(MI, addFrameReference(BuildMI(OC, 3).addReg(SrcReg),FrameIdx));
- return 2;
+ BuildMI(MBB, MI, PPC::IMPLICIT_DEF, 0, PPC::R0);
+ addFrameReference(BuildMI(MBB, MI, OC, 3).addReg(SrcReg),FrameIdx);
}
}
-int
+void
PowerPCRegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
unsigned DestReg, int FrameIdx) const{
@@ -99,32 +97,28 @@ PowerPCRegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
const TargetRegisterClass *RC = getRegClass(DestReg);
unsigned OC = Opcode[getIdx(RC)];
if (DestReg == PPC::LR) {
- MBB.insert(MI, addFrameReference(BuildMI(OC, 2, PPC::R0), FrameIdx));
- MBB.insert(MI, BuildMI(PPC::MTLR, 1).addReg(PPC::R0));
- return 2;
+ addFrameReference(BuildMI(MBB, MI, OC, 2, PPC::R0), FrameIdx);
+ BuildMI(MBB, MI, PPC::MTLR, 1).addReg(PPC::R0);
} else {
- MBB.insert(MI, BuildMI(PPC::IMPLICIT_DEF, 0, PPC::R0));
- MBB.insert(MI, addFrameReference(BuildMI(OC, 2, DestReg), FrameIdx));
- return 2;
+ BuildMI(MBB, MI, PPC::IMPLICIT_DEF, 0, PPC::R0);
+ addFrameReference(BuildMI(MBB, MI, OC, 2, DestReg), FrameIdx);
}
}
-int PowerPCRegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MI,
- unsigned DestReg, unsigned SrcReg,
- const TargetRegisterClass *RC) const {
+void PowerPCRegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MI,
+ unsigned DestReg, unsigned SrcReg,
+ const TargetRegisterClass *RC) const {
MachineInstr *I;
if (RC == PowerPC::GPRCRegisterClass) {
- I = BuildMI(PPC::OR, 2, DestReg).addReg(SrcReg).addReg(SrcReg);
+ BuildMI(MBB, MI, PPC::OR, 2, DestReg).addReg(SrcReg).addReg(SrcReg);
} else if (RC == PowerPC::FPRCRegisterClass) {
- I = BuildMI(PPC::FMR, 1, DestReg).addReg(SrcReg);
+ BuildMI(MBB, MI, PPC::FMR, 1, DestReg).addReg(SrcReg);
} else {
std::cerr << "Attempt to copy register that is not GPR or FPR";
abort();
}
- MBB.insert(MI, I);
- return 1;
}
//===----------------------------------------------------------------------===//
diff --git a/llvm/lib/Target/PowerPC/PowerPCRegisterInfo.h b/llvm/lib/Target/PowerPC/PowerPCRegisterInfo.h
index dfa571bb42d..6ede585740f 100644
--- a/llvm/lib/Target/PowerPC/PowerPCRegisterInfo.h
+++ b/llvm/lib/Target/PowerPC/PowerPCRegisterInfo.h
@@ -30,17 +30,17 @@ public:
const TargetRegisterClass* getRegClassForType(const Type* Ty) const;
/// Code Generation virtual methods...
- int storeRegToStackSlot(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MBBI,
- unsigned SrcReg, int FrameIndex) const;
-
- int loadRegFromStackSlot(MachineBasicBlock &MBB,
+ void storeRegToStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI,
- unsigned DestReg, int FrameIndex) const;
+ unsigned SrcReg, int FrameIndex) const;
+
+ void loadRegFromStackSlot(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MBBI,
+ unsigned DestReg, int FrameIndex) const;
- int copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
- unsigned DestReg, unsigned SrcReg,
- const TargetRegisterClass *RC) const;
+ void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
+ unsigned DestReg, unsigned SrcReg,
+ const TargetRegisterClass *RC) const;
void eliminateCallFramePseudoInstr(MachineFunction &MF,
MachineBasicBlock &MBB,
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