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| author | Sean Callanan <scallanan@apple.com> | 2009-08-20 18:24:27 +0000 |
|---|---|---|
| committer | Sean Callanan <scallanan@apple.com> | 2009-08-20 18:24:27 +0000 |
| commit | 46bb77f2cf2b477f0fd64614bf4c79b5b056c1be (patch) | |
| tree | 953c678c97303e8d4240bbf2ca37e1b931b38106 /llvm/lib/Target | |
| parent | 05046085b6e0b9269c1586901656a301ba8e419a (diff) | |
| download | bcm5719-llvm-46bb77f2cf2b477f0fd64614bf4c79b5b056c1be.tar.gz bcm5719-llvm-46bb77f2cf2b477f0fd64614bf4c79b5b056c1be.zip | |
Fixed PCMPESTRM128 to have opcode 0x60 instead of 0x62, as specified by the
Intel documentation.
llvm-svn: 79554
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrSSE.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td index 966833f44ad..795776708e6 100644 --- a/llvm/lib/Target/X86/X86InstrSSE.td +++ b/llvm/lib/Target/X86/X86InstrSSE.td @@ -3792,11 +3792,11 @@ def PCMPESTRM128MEM : SS42AI<0, Pseudo, (outs VR128:$dst), } let Defs = [XMM0, EFLAGS], Uses = [EAX, EDX] in { -def PCMPESTRM128rr : SS42AI<0x62, MRMSrcReg, (outs), +def PCMPESTRM128rr : SS42AI<0x60, MRMSrcReg, (outs), (ins VR128:$src1, VR128:$src3, i8imm:$src5), "pcmpestrm\t{$src5, $src3, $src1|$src1, $src3, $src5}", []>, OpSize; -def PCMPESTRM128rm : SS42AI<0x62, MRMSrcMem, (outs), +def PCMPESTRM128rm : SS42AI<0x60, MRMSrcMem, (outs), (ins VR128:$src1, i128mem:$src3, i8imm:$src5), "pcmpestrm\t{$src5, $src3, $src1|$src1, $src3, $src5}", []>, OpSize; |
